Jason Chen CJ 3d5d6c96ec vcpu: add get/set register APIs ... there will be 3 types of vcpu runtime contexts: - runtime contexts always saved/restored during VM exit/entry, which include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and msr for spectre control (ia32_spec_ctrl) - runtime contexts on-demand cached/updated during VM exit/entry, which include frequently used registers rsp, rip, efer, rflags, cr0 and cr4 - runtime contexts always read/write from/to VMCS, which include left registers not in above this patch add get/set register APIs for vcpu runtime contexts, and unified the save/restore method for them according to above description. v3: - update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4, use on-demand cache for reading, but always write to VMCS for writing. v2: - use reg_cached/reg_updated for on-demand runtime contexts - always read/write cr3 from/to VMCS Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2018-08-07 09:55:13 +08:00
..
include	HV: guest: cleanup of remaining integral type violations	2018-07-23 10:23:49 +08:00
ld	hv: build hypervisor as PIE (position-independent executable)	2018-07-11 10:25:16 +08:00
sbl	add CONFIG_VM0_DESC support	2018-07-25 17:18:14 +08:00
uefi	vcpu: add get/set register APIs	2018-08-07 09:55:13 +08:00