mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-11-16 22:33:00 +00:00
1cd25dec98
Tracked-On: #8788 Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
85 lines
1.1 KiB
Plaintext
85 lines
1.1 KiB
Plaintext
/*
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* Copyright (C) 2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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OUTPUT_ARCH(riscv)
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ENTRY(_start)
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SECTIONS
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{
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. = CONFIG_HV_RAM_START;
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_code_start = .;
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.text :
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{
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_text_start = .;
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*(.text.entry) /* Entry point code first */
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*(.text)
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*(.text.*)
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*(.note.gnu.build-id) /* Keep build ID for debugging */
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. = ALIGN(8);
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_text_end = .;
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}
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. = ALIGN(0x1000);
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.rodata :
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{
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_rodata_start = .;
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*(.rodata)
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*(.rodata.*)
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/* Small rodata sections */
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*(.srodata)
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*(.srodata.*)
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. = ALIGN(8);
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_rodata_end = .;
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}
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. = ALIGN(0x1000);
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.data :
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{
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_data_start = .;
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*(.data.page_aligned)
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*(.data)
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*(.data.*)
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/* Small data sections */
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*(.sdata)
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*(.sdata.*)
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. = ALIGN(8);
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_data_end = .;
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}
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. = ALIGN(0x1000);
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.boot_stack :
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{
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_boot_stack_start = .;
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. += 0x1000;
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. = ALIGN(16); /* RISC-V ABI requires 16-byte stack alignment */
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_boot_stack_end = .;
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}
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. = ALIGN(0x1000);
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.bss (NOLOAD) :
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{
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_bss_start = .;
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*(.bss)
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*(.bss.*)
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/* Small BSS sections */
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*(.sbss)
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*(.sbss.*)
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. = ALIGN(8);
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_bss_end = .;
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}
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. = ALIGN(0x1000);
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_code_end = .;
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}
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