Xue Bosheng 5f59c02a81 hv: init sched and run idle thread in risicv AP initialization ...

init sched and call run_idle_thred in init_pcpu_comm_post to switch to idle
thread after AP initialization finish.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

2025-09-30 12:31:07 +08:00

..

boot

hv: risc-v: add assembly code for BSP and AP boot

2025-09-15 13:12:21 +08:00

guest

…

cpu.c

hv: implement cpu dead and cpu idle for riscv

2025-09-30 12:31:07 +08:00

dummy_entry.S

…

dummy.c

…

init.c

hv: init sched and run idle thread in risicv AP initialization

2025-09-30 12:31:07 +08:00

intr.S

hv: riscv: irq: add interrupt initialization and handlers

2025-09-29 14:01:00 +08:00

irq.c

hv: abstract IRQ related macros

2025-09-29 14:01:00 +08:00

link_ram.ld.in

hv: risc-v: update link script

2025-09-15 13:12:21 +08:00

logmsg.c

[FIXME] hv: riscv: add a stub do_logmsg for build

2025-09-23 11:30:38 +08:00

Makefile

hv: add arch_switch_to support for riscv

2025-09-30 12:31:07 +08:00

notify.c

hv: add arch_send_reschedule_request implementation for riscv support

2025-09-30 12:31:07 +08:00

sbi.c

hv: enable acrnlog in release builds

2025-09-25 16:30:26 +08:00

sched.S

hv: add arch_switch_to support for riscv

2025-09-30 12:31:07 +08:00

timer.c

risc-v: initial timer codes

2025-09-17 08:55:12 +08:00

trap.c

hv: riscv: irq: add interrupt initialization and handlers

2025-09-29 14:01:00 +08:00