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https://github.com/projectacrn/acrn-hypervisor.git
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cf73187528
add pgtable callbacks set_pgentry to implement arch specific set generic page table entry for any paging level, and remove x86 specific tweak_exe_right/recover_exe_right callbacks, move the logic in set_pgentry callback. remove common set_pgentry function to avoid confusing. Tracked-On: #8831 Signed-off-by: hangliu1 <hang1.liu@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
118 lines
4.1 KiB
C
118 lines
4.1 KiB
C
/*
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* Copyright (C) 2018-2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <util.h>
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#include <acrn_hv_defs.h>
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#include <asm/page.h>
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#include <pgtable.h>
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#include <mmu.h>
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#include <logmsg.h>
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#if CONFIG_SERIAL_8250_PCI
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static uint8_t uart_pde_page[PAGE_SIZE]__aligned(PAGE_SIZE);
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static uint8_t uart_pdpte_page[PAGE_SIZE]__aligned(PAGE_SIZE);
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void early_pgtable_map_uart(uint64_t addr)
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{
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uint64_t *pml4e, *pdpte, *pde;
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uint64_t value;
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CPU_CR_READ(cr3, &value);
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/*assumpiton for map high mmio in early pagetable is that it is only used for
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2MB page since 1G page may not available when memory width is 39bit */
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pml4e = pgtl3e_offset((uint64_t *)value, addr);
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/* address is above 512G */
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if(!(*pml4e & PAGE_PRESENT)) {
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*pml4e = hva2hpa_early(uart_pdpte_page) + (PAGE_PRESENT|PAGE_RW);
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}
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pdpte = pgtl2e_offset(pml4e, addr);
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if(!(*pdpte & PAGE_PRESENT)) {
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*(pdpte) = hva2hpa_early(uart_pde_page) + (PAGE_PRESENT|PAGE_RW);
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pde = pgtl1e_offset(pdpte, addr);
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*pde = (addr & PGTL1_MASK) + (PAGE_PRESENT|PAGE_RW|PAGE_PSE);
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} else if(!(*pdpte & PAGE_PSE)) {
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pde = pgtl1e_offset(pdpte, addr);
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if(!(*pde & PAGE_PRESENT)) {
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*pde = (addr & PGTL1_MASK) + (PAGE_PRESENT|PAGE_RW|PAGE_PSE);
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}
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} else {
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/* no process */
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}
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}
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#endif
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/**
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* @brief Create a root page table for Secure World.
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*
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* This function initializes a new root page table for Secure World. It is intended to be used during the initialization
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* phase of Trusty, setting up isolated memory regions for secure execution. Secure world can access Normal World's
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* memory, but Normal World cannot access Secure World's memory. The PML4T/PDPT for Secure World are separated from
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* Normal World. PDT/PT are shared in both Secure World's EPT and Normal World's EPT. So this function copies the PDPTEs
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* from the Normal World to the Secure World.
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*
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* - It creates a new root page table and every entries are initialized to point to the sanitized page by default.
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* - The access right specified by prot_clr is cleared for Secure World PDPTEs.
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* - Finally, the function returns the new root page table pointer.
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*
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* @param[in] table A pointer to the struct pgtable containing the information of the specified memory operations.
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* @param[in] nworld_pml4_page A pointer to pml4 table hierarchy in Normal World.
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* @param[in] prot_table_present Mask indicating the page referenced is present.
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* @param[in] prot_clr Bit positions representing the specified properties which need to be cleared.
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*
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* @return A pointer to the newly created root page table for Secure World.
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*
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* @pre table != NULL
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* @pre nworld_pml4_page != NULL
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*
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* @post N/A
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*/
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void *pgtable_create_trusty_root(const struct pgtable *table,
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void *nworld_pml4_page, uint64_t prot_table_present, uint64_t prot_clr)
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{
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uint16_t i;
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uint64_t pdpte, *dest_pdpte_p, *src_pdpte_p;
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uint64_t nworld_pml4e, sworld_pml4e;
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void *sub_table_addr, *pml4_base;
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/* Copy PDPT entries from Normal world to Secure world
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* Secure world can access Normal World's memory,
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* but Normal World can not access Secure World's memory.
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* The PML4/PDPT for Secure world are separated from
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* Normal World. PD/PT are shared in both Secure world's EPT
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* and Normal World's EPT
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*/
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pml4_base = pgtable_create_root(table);
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/* The trusty memory is remapped to guest physical address
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* of gpa_rebased to gpa_rebased + size
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*/
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sub_table_addr = alloc_page(table->pool);
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sworld_pml4e = hva2hpa(sub_table_addr) | prot_table_present;
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*(uint64_t *)pml4_base = sworld_pml4e;
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table->flush_cache_pagewalk(pml4_base);
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nworld_pml4e = get_pgentry((uint64_t *)nworld_pml4_page);
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/*
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* copy PTPDEs from normal world EPT to secure world EPT,
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* and remove execute access attribute in these entries
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*/
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dest_pdpte_p = page_addr(sworld_pml4e);
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src_pdpte_p = page_addr(nworld_pml4e);
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for (i = 0U; i < (uint16_t)(PTRS_PER_PGTL2E - 1UL); i++) {
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pdpte = get_pgentry(src_pdpte_p);
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if ((pdpte & prot_table_present) != 0UL) {
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pdpte &= ~prot_clr;
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*dest_pdpte_p = pdpte;
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table->flush_cache_pagewalk(dest_pdpte_p);
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}
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src_pdpte_p++;
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dest_pdpte_p++;
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}
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return pml4_base;
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}
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