Yin Fengwei 9df8790ffc hv: Fix two minor issues in instruction emulation code ...

1. The wrong operand size is assigned in instruction decode phase
   if the operand size is 1 byte.

   According to the SDM, the bit 0(w bit) of opcode should be checked
   first to detect whether the operand size is 1 byte. Then, check
   whether there is prefix to overwrite the default operand size.

   The original instruction decode doesn't care about the operand
   size. But do opsize fixup during instruction emulation phase.
   With ACRN we need operand size packed to ioreq and send to DM
   after instruction decode.

2. We should always touch the GPA by following opsize to avoid side
   effect (especially when GPA is for a MMIO).

Tracked-On: #1337
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>

2018-09-28 13:10:54 +08:00

..

guest.c

hv: Enable the compiler warning as error for HV

2018-09-27 11:22:44 +08:00

instr_emul.c

hv: Fix two minor issues in instruction emulation code

2018-09-28 13:10:54 +08:00

instr_emul.h

hv:Fix Implict conversion:actual to formal param

2018-09-18 13:09:39 +08:00

mptable.c

hv: merge hv_lib.h and hypervisor.h

2018-09-27 15:55:41 +08:00

pm.c

hv: arch: fix 'Unused procedure parameter'

2018-09-26 10:48:55 +08:00

ucode.c

hv:Fix unused var value on all paths

2018-09-26 11:10:21 +08:00

vcpu.c

hv:Replace vlapic pointer with instance in vcpu_arch

2018-09-12 09:20:07 +08:00

vlapic_priv.h

hv:Move vlapic structure to vlapic.h

2018-09-12 09:20:07 +08:00

vlapic.c

hv: arch: fix 'Unused procedure parameter'

2018-09-26 10:48:55 +08:00

vm.c

HV: modify code for intr storm detect & handling

2018-09-25 11:09:35 +08:00

vmcall.c

HV: Add hypercall to set/clear IRQ line

2018-09-27 16:49:52 +08:00

vmsr.c

hv: Replace dynamic memory allocation for MSR bitmap

2018-09-12 09:20:07 +08:00