Sainath Grandhi 6d5456a0df hv: Bit Representation for IOAPIC RTE ...

As we enable Interrupt Remapping, bit positions in IOAPIC RTEs
have a different syntax for programming. ACRN should handle original
format for vIOAPIC as well IR representation for physical IOAPIC.
This patch adds bit granularity IOAPIC RTE.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>

2019-01-26 23:25:34 +08:00

..

guest.c

HV: rename the term of vm0 to sos vm

2019-01-21 18:03:31 +08:00

instr_emul.c

HV: modularization cleanup instr_emul header file

2019-01-22 10:50:30 +08:00

pm.c

HV: rename the term of vm0 to sos vm

2019-01-21 18:03:31 +08:00

ucode.c

hv: refine coding style for ucode.c

2018-12-19 09:44:42 +08:00

vcpu.c

hv: fix possible buffer overflow in 'vcpu_set_eoi_exit()'

2019-01-25 11:26:45 +08:00

vcpuid.c

HV: rename the term of vm0 to sos vm

2019-01-21 18:03:31 +08:00

vlapic_priv.h

hv: self-IPI APIC register in x2APIC mode of guest vLAPIC

2018-11-02 13:48:43 +08:00

vlapic.c

hv: Bit Representation for IOAPIC RTE

2019-01-26 23:25:34 +08:00

vm.c

HV: sanitize vm config

2019-01-25 21:30:49 +08:00

vmcall.c

HV: rename the term of vm0 to sos vm

2019-01-21 18:03:31 +08:00

vmsr.c

HV: rename the term of vm0 to sos vm

2019-01-21 18:03:31 +08:00

vmtrr.c

HV: rename the term of vm0 to sos vm

2019-01-21 18:03:31 +08:00