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This patch implements the VMREAD and VMWRITE instructions. When L1 guest is running with an active VMCS12, the “VMCS shadowing” VM-execution control is always set to 1 in VMCS01. Thus the possible behavior of VMREAD or VMWRITE from L1 could be: - It causes a VM exit to L0 if the bit corresponds to the target VMCS field in the VMREAD bitmap or VMWRITE bitmap is set to 1. - It accesses the VMCS referenced by VMCS01 link pointer (VMCS02 in our case) if the above mentioned bit is set to 0. This patch handles the VMREAD and VMWRITE VM exits in this way: - on VMWRITE, it writes the desired VMCS value to the respective field in the cached VMCS12. For VMCS fields that need to be synced to VMCS02, sets the corresponding dirty flag. - on VMREAD, it reads the desired VMCS value from the cached VMCS12. Tracked-On: #5923 Signed-off-by: Alex Merritt <alex.merritt@intel.com> Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@Intel.com> |
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.. | ||
assign.h | ||
ept.h | ||
guest_memory.h | ||
guest_pm.h | ||
hyperv.h | ||
instr_emul.h | ||
nested.h | ||
splitlock.h | ||
trusty.h | ||
ucode.h | ||
vcpu.h | ||
vcpuid.h | ||
virq.h | ||
virtual_cr.h | ||
vlapic.h | ||
vm_reset.h | ||
vm.h | ||
vmcs.h | ||
vmexit.h | ||
vmtrr.h | ||
vmx_io.h |