Jian Jun Chen b854a24109 hv: risc-v: add C entry function of BSP and APs ...

Tracked-On: #8788
Signed-off-by: Haicheng Li <haicheng.li@intel.com>
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

2025-09-15 13:12:21 +08:00

..

arch

hv: risc-v: add C entry function of BSP and APs

2025-09-15 13:12:21 +08:00

common

hv: smpcall: abstract a common SMP call framework

2025-09-09 16:37:04 +08:00

debug

hv: trace: show cpu usage of vms in pcpu sharing case

2024-06-28 12:55:23 +08:00

dm

doc: add module design for peripheral vuart device

2024-08-20 17:23:42 +08:00

hw

hv: pci: Add guest cfg header access handling of type 1 device

2024-06-27 11:26:09 +08:00

lib

hv: add clamp macro for convenience

2023-09-18 16:26:05 +08:00

public

hv: add GUEST_FLAG_STATELESS flag

2024-07-30 09:26:50 +08:00