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https://github.com/projectacrn/acrn-hypervisor.git
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a5e46a70ff
This patch:
- abstracts the common logic from existing x86 implementation
- moves x86-specific logic to arch/x86/notify.c
A new common/notify.{c,h} is introduced to provide a common SMP call framework for
multi-arch support in ACRN.
arch-specific files such as arch/{x86,riscv}/notify.c is aim to provide the
corresponding implementations respectively.
The framework provides the following common APIs:
- init_smp_call(): initialize the SMP call support during pCPU initialization
- handle_smp_call(): execute the SMP call notification handler
- smp_call_function(): trigger the SMP call request to target pCPUs
Other SW modules should invoke these common APIs to perform arch-independent
SMP operations.
Two arch-specific hooks are abstracted:
- arch_smp_call_kick_pcpu():
- On x86, special handling is required when LAPIC is passthrough.
- On RISC-V, a plain IPI is sufficient to kick the target pCPU.
- arch_init_smp_call():
- On x86, CPU initialization reserves dedicated vectors and
registers callback handlers for purposes such as notifications
or posted interrupts.
- On RISC-V, no special handling is required at present; this
can be extended in the future if needed.
----------
Changelog:
* Merged the following two patches into one:
[RFC PATCH v2 4/7] hv: introduce common/smp.{c,h}
[RFC PATCH v2 5/7] hv: smpcall: x86: adapt to common SMP call
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
103 lines
2.8 KiB
C
103 lines
2.8 KiB
C
/*
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* Copyright (C) 2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm/cpu.h>
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#include <asm/lib/atomic.h>
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#include <asm/lib/bits.h>
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#include <asm/per_cpu.h>
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#include <asm/notify.h>
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#include <common/notify.h>
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static volatile uint64_t smp_call_mask = 0UL;
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/**
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* Run in interrupt context.
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*
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* Two use cases are covered:
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* - SMP call: when the corresponding bit in smp_call_mask is set and
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* smp_call_info in the per-CPU region is specified.
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* The registered callback will be invoked.
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*
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* - Kick pCPU out of non-root mode: when the corresponding bit in smp_call_mask is clear and
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* smp_call_info in the per-CPU region is not specified.
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* No callback is invoked.
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*/
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void kick_notification(__unused uint32_t irq, __unused void *data)
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{
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uint16_t pcpu_id = get_pcpu_id();
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if (bitmap_test(pcpu_id, &smp_call_mask)) {
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struct smp_call_info_data *smp_call = &per_cpu(smp_call_info, pcpu_id);
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if (smp_call->func != NULL) {
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smp_call->func(smp_call->data);
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}
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bitmap_clear_lock(pcpu_id, &smp_call_mask);
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}
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}
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/**
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* Execute the SMP call notification handler
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*/
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void handle_smp_call(void)
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{
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kick_notification(0U, NULL);
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}
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/**
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* Trigger the SMP call request to target pCPUs
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*/
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void smp_call_function(uint64_t mask, smp_call_func_t func, void *data)
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{
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uint16_t pcpu_id;
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struct smp_call_info_data *smp_call;
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/* wait for previous smp call complete, which may run on other cpus */
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while (atomic_cmpxchg64(&smp_call_mask, 0UL, mask) != 0UL);
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pcpu_id = ffs64(mask);
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while (pcpu_id < MAX_PCPU_NUM) {
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bitmap_clear_nolock(pcpu_id, &mask);
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if (pcpu_id == get_pcpu_id()) {
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func(data);
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bitmap_clear_nolock(pcpu_id, &smp_call_mask);
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} else if (is_pcpu_active(pcpu_id)) {
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smp_call = &per_cpu(smp_call_info, pcpu_id);
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smp_call->func = func;
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smp_call->data = data;
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/**
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* arch_smp_call_kick_pcpu() is abstracted because:
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* - On x86, special handling is required when LAPIC is passthrough.
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* - On RISC-V, a plain IPI is sufficient to kick the target pCPU.
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*/
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arch_smp_call_kick_pcpu(pcpu_id);
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} else {
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/* pcpu is not in active, print error */
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pr_err("pcpu_id %d not in active!", pcpu_id);
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bitmap_clear_nolock(pcpu_id, &smp_call_mask);
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}
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pcpu_id = ffs64(mask);
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}
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/* wait for current smp call complete */
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wait_sync_change(&smp_call_mask, 0UL);
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}
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/**
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* Initialize the SMP call support during pCPU initialization
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*/
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void init_smp_call(void)
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{
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/**
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* arch_init_smp_call() is abstracted because:
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* - On x86, during CPU initialization, software reserves dedicated vectors and registers callback handlers
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* for purposes such as notifications or posted interrupts.
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* - On RISC-V, no special handling is required at present; this can be extended in the future if needed.
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*/
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arch_init_smp_call();
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}
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