Jian Jun Chen 75a932eeab hv: riscv: add virtual interrupt injection support ...

Add virtual interrupt injection infrastructure for RISC-V hypervisor.
Implement vcpu_set_intr() and vcpu_clear_intr() to manage virtual
interrupt pending state by updating irqs_pending bitmap.
Add vcpu_inject_pending_intr() to inject pending interrupts into
VS-mode by updating HVIP CSR with atomic operations.

Tracked-On: #8844
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>

2025-11-25 15:46:29 +08:00

..

riscv/asm

hv: riscv: add virtual interrupt injection support

2025-11-25 15:46:29 +08:00

x86/asm

hv: multi-arch: move NR_IRQS definition to arch-specific headers

2025-11-05 15:14:41 +08:00