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83a938bae6
The coding guideline rules C-TY-27 and C-TY-28, combined, requires that assignment and arithmetic operations shall be applied only on operands of the same kind. This patch either adds explicit type casts or adjust types of variables to align the types of operands. The only semantic change introduced by this patch is the promotion of the second argument of set_vmcs_bit() and clear_vmcs_bit() to uint64_t (formerly uint32_t). This avoids clear_vmcs_bit() to accidentally clears the upper 32 bits of the requested VMCS field. Other than that, this patch has no semantic change. Specifically this patch is not meant to fix buggy narrowing operations, only to make these operations explicit. Tracked-On: #6776 Signed-off-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VMCS_H_
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#define VMCS_H_
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#define VM_SUCCESS 0
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#define VM_FAIL (-1)
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#ifndef ASSEMBLER
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#include <types.h>
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#include <asm/guest/vcpu.h>
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#define VMX_VMENTRY_FAIL 0x80000000U
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#define APIC_ACCESS_OFFSET 0xFFFUL /* 11:0, offset within the APIC page */
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#define APIC_ACCESS_TYPE 0xF000UL /* 15:12, access type */
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#define TYPE_LINEAR_APIC_INST_READ (0UL << 12U)
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#define TYPE_LINEAR_APIC_INST_WRITE (1UL << 12U)
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/* VM exit qulifications for APIC-access
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* Access type:
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* 0 = linear access for a data read during instruction execution
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* 1 = linear access for a data write during instruction execution
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* 2 = linear access for an instruction fetch
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* 3 = linear access (read or write) during event delivery
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* 10 = guest-physical access during event delivery
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* 15 = guest-physical access for an instructon fetch or during
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* instruction execution
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*/
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static inline uint64_t apic_access_type(uint64_t qual)
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{
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return (qual & APIC_ACCESS_TYPE);
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}
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static inline uint64_t apic_access_offset(uint64_t qual)
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{
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return (qual & APIC_ACCESS_OFFSET);
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}
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static inline void clear_vmcs_bit(uint32_t vmcs_field, uint64_t bit)
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{
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uint64_t val64;
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val64 = exec_vmread(vmcs_field);
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val64 &= ~bit;
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exec_vmwrite(vmcs_field, val64);
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}
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static inline void set_vmcs_bit(uint32_t vmcs_field, uint64_t bit)
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{
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uint64_t val64;
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val64 = exec_vmread(vmcs_field);
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val64 |= bit;
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exec_vmwrite(vmcs_field, val64);
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}
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void init_vmcs(struct acrn_vcpu *vcpu);
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void load_vmcs(const struct acrn_vcpu *vcpu);
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void init_host_state(void);
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void switch_apicv_mode_x2apic(struct acrn_vcpu *vcpu);
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#endif /* ASSEMBLER */
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#endif /* VMCS_H_ */
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