mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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fc495b946a
This patch implements interrupt initialization and the basic exception/interrupt handling flow on RISC-V. init_interrupt() needs to be invoked during CPU initialization to set up the trap vector and enable the interrupt. RISC-V exception and interrupt handling includes: - Saving and restoring CPU registers around traps - Implementing handlers for: - Supervisor software interrupt - Supervisor timer interrupt - Halting the CPU for all other interrupts and exceptions ------ TODOs: 1. add support for registering interrupt handlers via request_irq() and further adoption of the common IRQ framework. 2. add support for external interrupt. Tracked-On: #8813 Signed-off-by: Haicheng Li <haicheng.li@intel.com> Co-developed-by: Shiqing Gao <shiqing.gao@intel.com> Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Yifan Liu <yifan1.liu@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
74 lines
1.8 KiB
C
74 lines
1.8 KiB
C
/*
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* Copyright (C) 2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef COMMON_CPU_H
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#define COMMON_CPU_H
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#include <types.h>
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#include <asm/cpu.h>
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#define CPU_UP_TIMEOUT 100U /* millisecond */
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#define CPU_DOWN_TIMEOUT 100U /* millisecond */
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#define BSP_CPU_ID 0U /* Boot CPU ID */
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/**
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* The invalid cpu_id (INVALID_CPU_ID) is error code for error handling,
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* this means that caller can't find a valid physical cpu or virtual cpu.
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*/
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#define INVALID_CPU_ID 0xffffU
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/* hypervisor stack bottom magic('intl') */
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#define SP_BOTTOM_MAGIC 0x696e746cUL
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#ifndef ASSEMBLER
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/* CPU states defined */
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enum pcpu_boot_state {
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PCPU_STATE_RESET = 0U,
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PCPU_STATE_INITIALIZING,
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PCPU_STATE_RUNNING,
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PCPU_STATE_HALTED,
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PCPU_STATE_DEAD,
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};
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static inline uint16_t arch_get_pcpu_id(void);
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static inline void arch_set_current_pcpu_id(uint16_t pcpu_id);
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void arch_start_pcpu(uint16_t pcpu_id);
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static inline void arch_asm_pause(void);
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uint16_t arch_get_pcpu_num(void);
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uint16_t get_pcpu_nums(void);
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bool is_pcpu_active(uint16_t pcpu_id);
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void set_pcpu_active(uint16_t pcpu_id);
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void clear_pcpu_active(uint16_t pcpu_id);
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bool check_pcpus_active(uint64_t mask);
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bool check_pcpus_inactive(uint64_t mask);
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uint64_t get_active_pcpu_bitmap(void);
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void pcpu_set_current_state(uint16_t pcpu_id, enum pcpu_boot_state state);
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bool start_pcpus(uint64_t mask);
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#define ALL_CPUS_MASK ((1UL << get_pcpu_nums()) - 1UL)
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#define AP_MASK (ALL_CPUS_MASK & ~(1UL << BSP_CPU_ID))
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static inline uint16_t get_pcpu_id(void)
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{
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return arch_get_pcpu_id();
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}
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static inline void set_current_pcpu_id(uint16_t pcpu_id)
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{
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arch_set_current_pcpu_id(pcpu_id);
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}
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static inline void asm_pause(void)
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{
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arch_asm_pause();
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}
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#endif /* ASSEMBLER */
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#endif /* COMMON_CPU_H */
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