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8836abef21
There are so many __unused prefix spaning the emulate_xxx functions. This patch
unify the parameters of emulate_xxx to avoid it.
- All emulate_xxx functions are defined as emulate_xxx(struct vcpu *vcpu, instr_emul_vie *vie)
or emulate_xxx(struct vcpu *vcpu, instr_emul_vie *vie, struct vm_guest_paging *paging).
- Move mmio_read/write to instr_emul.c and call them directly.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
75 lines
3.0 KiB
C
75 lines
3.0 KiB
C
/*-
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* Copyright (c) 2012 NetApp, Inc.
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* Copyright (c) 2017 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _VMM_INSTRUCTION_EMUL_H_
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#define _VMM_INSTRUCTION_EMUL_H_
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#include "instr_emul_wrapper.h"
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/* Emulate the decoded 'ctxt->vie' instruction. */
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int vmm_emulate_instruction(struct instr_emul_ctxt *ctxt);
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int vie_update_register(struct vcpu *vcpu, enum cpu_reg_name reg,
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uint64_t val_arg, uint8_t size);
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/*
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* Returns 1 if an alignment check exception should be injected and 0 otherwise.
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*/
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int vie_alignment_check(uint8_t cpl, uint8_t size, uint64_t cr0,
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uint64_t rflags, uint64_t gla);
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/* Returns 1 if the 'gla' is not canonical and 0 otherwise. */
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int vie_canonical_check(enum vm_cpu_mode cpu_mode, uint64_t gla);
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int vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum cpu_reg_name seg,
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struct seg_desc *desc, uint64_t offset_arg, uint8_t length_arg,
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uint8_t addrsize, uint32_t prot, uint64_t *gla);
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int vie_init(struct instr_emul_vie *vie, struct vcpu *vcpu);
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/*
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* Decode the instruction fetched into 'vie' so it can be emulated.
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*
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* 'gla' is the guest linear address provided by the hardware assist
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* that caused the nested page table fault. It is used to verify that
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* the software instruction decoding is in agreement with the hardware.
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*
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* Some hardware assists do not provide the 'gla' to the hypervisor.
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* To skip the 'gla' verification for this or any other reason pass
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* in VIE_INVALID_GLA instead.
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*/
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#define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */
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int
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local_decode_instruction(enum vm_cpu_mode cpu_mode, bool cs_d, struct instr_emul_vie *vie);
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int emulate_instruction(struct vcpu *vcpu);
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int decode_instruction(struct vcpu *vcpu);
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#endif /* _VMM_INSTRUCTION_EMUL_H_ */
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