mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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da3d181f62
Initialize efi info of acrn mbi when boot from multiboot2 protocol, with this patch hypervisor could get host efi info and pass it to Linux zeropage, then make guest Linux possible to boot with efi environment; Tracked-On: #4419 Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
257 lines
6.7 KiB
ArmAsm
257 lines
6.7 KiB
ArmAsm
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* NOTE:
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*
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* MISRA C requires that all unsigned constants should have the suffix 'U'
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* (e.g. 0xffU), but the assembler may not accept such C-style constants. For
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* example, binutils 2.26 fails to compile assembly in that case. To work this
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* around, all unsigned constants must be explicitly spells out in assembly
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* with a comment tracking the original expression from which the magic
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* number is calculated. As an example:
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*
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* /* 0x00000668 =
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* * (CR4_DE | CR4_PAE | CR4_MCE | CR4_OSFXSR | CR4_OSXMMEXCPT) *\/
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* movl $0x00000668, %eax
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*
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* Make sure that these numbers are updated accordingly if the definition of
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* the macros involved are changed.
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*/
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#include <multiboot.h>
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#ifdef CONFIG_MULTIBOOT2
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#include <multiboot2.h>
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#endif
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/* MULTIBOOT HEADER */
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#define MULTIBOOT_HEADER_FLAGS MULTIBOOT_HEADER_NEED_MEMINFO
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.extern cpu_primary_save32
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.extern cpu_primary_save64
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.section multiboot_header, "a"
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.align 4
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/* header magic */
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.long MULTIBOOT_HEADER_MAGIC
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/* header flags - flags bit 6 : enable mmap_* */
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.long MULTIBOOT_HEADER_FLAGS
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/* header checksum = -(magic + flags) */
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.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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#ifdef CONFIG_MULTIBOOT2
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.align MULTIBOOT2_HEADER_ALIGN
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mb2_header_start:
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/* Magic number indicating a Multiboot2 header. */
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.long MULTIBOOT2_HEADER_MAGIC
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/* Architecture: i386. */
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.long MULTIBOOT2_ARCHITECTURE_I386
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/* Multiboot2 header length. */
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.long mb2_header_end - mb2_header_start
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/* Multiboot2 header checksum. */
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.long -(MULTIBOOT2_HEADER_MAGIC + MULTIBOOT2_ARCHITECTURE_I386 + (mb2_header_end - mb2_header_start))
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/* please be aware that each tag should be 8 bytes aligned */
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.align MULTIBOOT2_TAG_ALIGN
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info_req_tag_start:
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.short MULTIBOOT2_HEADER_TAG_INFORMATION_REQUEST
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.short 0
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.long info_req_tag_end - info_req_tag_start
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.long MULTIBOOT2_TAG_TYPE_MMAP
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.long MULTIBOOT2_TAG_TYPE_MODULE
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.long MULTIBOOT2_TAG_TYPE_ACPI_NEW
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.long MULTIBOOT2_TAG_TYPE_EFI64
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.long MULTIBOOT2_TAG_TYPE_EFI_MMAP
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info_req_tag_end:
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.align MULTIBOOT2_TAG_ALIGN
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.short MULTIBOOT2_HEADER_TAG_END
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.short 0
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.long 8
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mb2_header_end:
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#endif
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.section entry, "ax"
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.align 8
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.code32
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.global cpu_primary_start_32
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cpu_primary_start_32:
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/* save the MULTBOOT magic number & MBI */
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movl %eax, (boot_regs)
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movl %ebx, (boot_regs+4)
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/* Save boot context from 32bit mode */
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call cpu_primary_save_32
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/* Disable interrupts */
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cli
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/* Clear direction flag */
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cld
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/* detect whether it is in long mode
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*
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* 0xc0000080 = MSR_IA32_EFER
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*/
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movl $0xc0000080, %ecx
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rdmsr
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/* 0x400 = MSR_IA32_EFER_LMA_BIT */
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test $0x400, %eax
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/* jump to 64bit entry if it is already in long mode */
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jne cpu_primary_start_64
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/* Disable paging */
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mov %cr0, %ebx
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/* 0x7fffffff = ~CR0_PG */
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andl $0x7fffffff, %ebx
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mov %ebx, %cr0
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/* Set DE, PAE, MCE and OS support bits in CR4
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* 0x00000668 =
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* (CR4_DE | CR4_PAE | CR4_MCE | CR4_OSFXSR | CR4_OSXMMEXCPT) */
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movl $0x00000668, %eax
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mov %eax, %cr4
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/* Set CR3 to PML4 table address */
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movl $cpu_boot32_page_tables_start, %edi
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mov %edi, %cr3
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/* Set LME bit in EFER */
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/* 0xc0000080 = MSR_IA32_EFER */
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movl $0xc0000080, %ecx
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rdmsr
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/* 0x00000100 = MSR_IA32_EFER_LME_BIT */
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orl $0x00000100, %eax
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wrmsr
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/* Enable paging, protection, numeric error and co-processor
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monitoring in CR0 to enter long mode */
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mov %cr0, %ebx
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/* 0x80000023 = (CR0_PG | CR0_PE | CR0_MP | CR0_NE) */
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orl $0x80000023, %ebx
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mov %ebx, %cr0
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/* Load temportary GDT pointer value */
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mov $cpu_primary32_gdt_ptr, %ebx
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lgdt (%ebx)
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/* Perform a long jump based to start executing in 64-bit mode */
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/* 0x0008 = HOST_GDT_RING0_CODE_SEL */
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ljmp $0x0008, $primary_start_long_mode
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.code64
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.org 0x200
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.global cpu_primary_start_64
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cpu_primary_start_64:
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/* save the MULTBOOT magic number & MBI */
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lea boot_regs(%rip), %rax
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movl %edi, (%rax)
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movl %esi, 4(%rax)
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/* Save boot context from 64bit mode */
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call cpu_primary_save_64
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primary_start_long_mode:
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/* Initialize temporary stack pointer */
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lea ld_bss_end(%rip), %rsp
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/*0x1000 = PAGE_SIZE*/
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add $0x1000,%rsp
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/* 16 = CPU_STACK_ALIGN */
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and $(~(16 - 1)),%rsp
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/*
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* Fix up the .rela sections
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* Notes: this includes the fixup to IDT tables and temporary
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* page tables
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*/
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call relocate
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/* Load temportary GDT pointer value */
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lea cpu_primary32_gdt_ptr(%rip), %rbx
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lgdt (%ebx)
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/* Set the correct long jump address */
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lea jmpbuf(%rip), %rax
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lea after(%rip), %rbx
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mov %rbx, (%rax)
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rex.w ljmp *(%rax)
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.data
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jmpbuf: .quad 0
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/* 0x0008 = HOST_GDT_RING0_CODE_SEL */
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.word 0x0008
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.text
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after:
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/* 0x10 = HOST_GDT_RING0_DATA_SEL*/
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movl $0x10,%eax
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mov %eax,%ss // Was 32bit POC Stack
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mov %eax,%ds // Was 32bit POC Data
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mov %eax,%es // Was 32bit POC Data
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mov %eax,%fs // Was 32bit POC Data
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mov %eax,%gs // Was 32bit POC CLS
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/* continue with chipset level initialization */
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call init_primary_pcpu
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loop:
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jmp loop
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.align 4
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.global boot_regs
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boot_regs:
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.long 0x00000000
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.long 0x00000000
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/* GDT table */
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.align 4
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cpu_primary32_gdt:
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.quad 0x0000000000000000
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.quad 0x00af9b000000ffff
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.quad 0x00cf93000000ffff
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cpu_primary32_gdt_end:
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/* GDT pointer */
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.align 2
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cpu_primary32_gdt_ptr:
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.short (cpu_primary32_gdt_end - cpu_primary32_gdt) - 1
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.quad cpu_primary32_gdt
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/* PML4, PDPT, and PD tables initialized to map first 4 GBytes of memory */
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/*0x1000 = PAGE_SIZE*/
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.align 0x1000
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.global cpu_boot32_page_tables_start
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cpu_boot32_page_tables_start:
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/* 0x3 = (PAGE_PRESENT | PAGE_RW) */
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.quad cpu_primary32_pdpt_addr + 0x3
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/*0x1000 = PAGE_SIZE*/
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.align 0x1000
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cpu_primary32_pdpt_addr:
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address = 0
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.rept 4
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/* 0x3 = (PAGE_PRESENT | PAGE_RW) */
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.quad cpu_primary32_pdt_addr + address + 0x3
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/*0x1000 = PAGE_SIZE*/
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address = address + 0x1000
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.endr
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/*0x1000 = PAGE_SIZE*/
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.align 0x1000
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cpu_primary32_pdt_addr:
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address = 0
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.rept 2048
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/* 0x83 = (PAGE_PSE | PAGE_PRESENT | PAGE_RW) */
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.quad address + 0x83
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address = address + 0x200000
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.endr
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#ifdef CONFIG_MULTIBOOT2
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.global efiloader_sig
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efiloader_sig:
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.asciz "EL64"
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#endif
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