Files
acrn-hypervisor/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
Zide Chen 1bc5c7ac5b hv/acrn-config/efi-stuf: assign hvlog and ramoops buffer address < 256MB
If HV relocation is enabled, either ACRN efi-stub or GRUB relocates
hypervisor image above HPA 256MB, thus we put hvlog and ramoops buffer
under 256MB to avoid conflict with hypervisor owned address.

This patch hardcodes these addresses:

0xa00000 - 0xdfffff: 4MiB for ramoops buffer
0xe00000 - 0xffffff: 2MiB for hvlog buffer

However, user can customize them to other addresses as long as it's under
256MB, available in host e820, and SOS bootarg "nokaslr" is not specified.

If HV relocation is disabled, need to make sure that these buffer
addresses are not between HV_RAM_START and HV_RAM_START + HV_RAM_SIZE.

Tracked-On: #4760
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2020-05-13 08:36:54 +08:00

46 lines
984 B
C

/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MISC_CFG_H
#define MISC_CFG_H
#define MAX_PCPU_NUM 4U
#define MAX_PLATFORM_CLOS_NUM 4U
#define ROOTFS_0 "root=/dev/sda3 "
#define ROOTFS_1 "root=/dev/mmcblk0p3 "
#define SOS_ROOTFS ROOTFS_1
#define SOS_CONSOLE "console=ttyS0 "
#define SOS_COM1_BASE 0x3F8U
#define SOS_COM1_IRQ 4U
#define SOS_COM2_BASE 0x2F8U
#define SOS_COM2_IRQ 3U
#ifndef CONFIG_RELEASE
#define BOOTARG_DEBUG "hvlog=2M@0xe00000 " \
"memmap=0x600000$0xa00000 " \
"ramoops.mem_address=0xa00000 " \
"ramoops.mem_size=0x400000 " \
"ramoops.console_size=0x200000 " \
"reboot_panic=p,w "
#else
#define BOOTARG_DEBUG ""
#endif
#define SOS_BOOTARGS_DIFF BOOTARG_DEBUG \
"module_blacklist=dwc3_pci " \
"i915.enable_guc=0x02 " \
"cma=64M@0- "
#define MAX_HIDDEN_PDEVS_NUM 1U
#define HI_MMIO_START ~0UL
#define HI_MMIO_END 0UL
#endif /* MISC_CFG_H */