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https://github.com/projectacrn/acrn-hypervisor.git
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9e7abbb38c
IC_ASSIGN_MMIODEV -> ACRN_IOCTL_ASSIGN_MMIODEV IC_DEASSIGN_MMIODEV -> ACRN_IOCTL_DEASSIGN_MMIODEV struct acrn_mmiodev has slight change. Move struct acrn_mmiodev into acrn_common.h because it is used by both DM and HV. Tracked-On: #6282 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
334 lines
10 KiB
C
334 lines
10 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright (c) 2017 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Copyright (C) 2017 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/**
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* @file hsm_ioctl_defs.h
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*
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* @brief Hypervisor Module definition for ioctl to user space
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*/
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#ifndef _VHM_IOCTL_DEFS_H_
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#define _VHM_IOCTL_DEFS_H_
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#include <linux/types.h>
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/* Commmon structures for ACRN/HSM/DM */
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#include "acrn_common.h"
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/* The ioctl type, documented in ioctl-number.rst */
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#define ACRN_IOCTL_TYPE 0xA2
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/*
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* Commmon IOCTL ID defination for HSM/DM
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*/
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#define _IC_ID(x, y) (((x)<<24)|(y))
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#define IC_ID 0x43UL
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/*
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* Common IOCTL IDs definition for ACRN userspace
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*/
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#define ACRN_IOCTL_GET_PLATFORM_INFO \
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_IOR(ACRN_IOCTL_TYPE, 0x03, struct acrn_platform_info)
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#define ACRN_IOCTL_CREATE_VM \
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_IOWR(ACRN_IOCTL_TYPE, 0x10, struct acrn_vm_creation)
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#define ACRN_IOCTL_DESTROY_VM \
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_IO(ACRN_IOCTL_TYPE, 0x11)
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#define ACRN_IOCTL_START_VM \
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_IO(ACRN_IOCTL_TYPE, 0x12)
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#define ACRN_IOCTL_PAUSE_VM \
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_IO(ACRN_IOCTL_TYPE, 0x13)
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#define ACRN_IOCTL_RESET_VM \
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_IO(ACRN_IOCTL_TYPE, 0x15)
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#define ACRN_IOCTL_SET_VCPU_REGS \
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_IOW(ACRN_IOCTL_TYPE, 0x16, struct acrn_vcpu_regs)
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/* IRQ and Interrupts */
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#define ACRN_IOCTL_INJECT_MSI \
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_IOW(ACRN_IOCTL_TYPE, 0x23, struct acrn_msi_entry)
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#define ACRN_IOCTL_VM_INTR_MONITOR \
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_IOW(ACRN_IOCTL_TYPE, 0x24, unsigned long)
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#define ACRN_IOCTL_SET_IRQLINE \
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_IOW(ACRN_IOCTL_TYPE, 0x25, __u64)
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/* DM ioreq management */
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#define ACRN_IOCTL_NOTIFY_REQUEST_FINISH \
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_IOW(ACRN_IOCTL_TYPE, 0x31, struct acrn_ioreq_notify)
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#define ACRN_IOCTL_CREATE_IOREQ_CLIENT \
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_IO(ACRN_IOCTL_TYPE, 0x32)
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#define ACRN_IOCTL_ATTACH_IOREQ_CLIENT \
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_IO(ACRN_IOCTL_TYPE, 0x33)
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#define ACRN_IOCTL_DESTROY_IOREQ_CLIENT \
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_IO(ACRN_IOCTL_TYPE, 0x34)
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#define ACRN_IOCTL_CLEAR_VM_IOREQ \
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_IO(ACRN_IOCTL_TYPE, 0x35)
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/* Guest memory management */
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#define ACRN_IOCTL_SET_MEMSEG \
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_IOW(ACRN_IOCTL_TYPE, 0x41, struct acrn_vm_memmap)
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#define ACRN_IOCTL_UNSET_MEMSEG \
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_IOW(ACRN_IOCTL_TYPE, 0x42, struct acrn_vm_memmap)
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/* PCI assignment*/
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#define IC_ID_PCI_BASE 0x50UL
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#define ACRN_IOCTL_SET_PTDEV_INTR \
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_IOW(ACRN_IOCTL_TYPE, 0x53, struct acrn_ptdev_irq)
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#define ACRN_IOCTL_RESET_PTDEV_INTR \
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_IOW(ACRN_IOCTL_TYPE, 0x54, struct acrn_ptdev_irq)
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#define ACRN_IOCTL_ASSIGN_PCIDEV \
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_IOW(ACRN_IOCTL_TYPE, 0x55, struct acrn_pcidev)
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#define ACRN_IOCTL_DEASSIGN_PCIDEV \
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_IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev)
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#define ACRN_IOCTL_ASSIGN_MMIODEV \
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_IOW(ACRN_IOCTL_TYPE, 0x57, struct acrn_mmiodev)
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#define ACRN_IOCTL_DEASSIGN_MMIODEV \
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_IOW(ACRN_IOCTL_TYPE, 0x58, struct acrn_mmiodev)
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#define IC_ADD_HV_VDEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x09)
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#define IC_REMOVE_HV_VDEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x0A)
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/* Power management */
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#define IC_ID_PM_BASE 0x60UL
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#define IC_PM_GET_CPU_STATE _IC_ID(IC_ID, IC_ID_PM_BASE + 0x00)
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/* VHM eventfd */
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#define IC_ID_EVENT_BASE 0x70UL
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#define IC_EVENT_IOEVENTFD _IC_ID(IC_ID, IC_ID_EVENT_BASE + 0x00)
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#define IC_EVENT_IRQFD _IC_ID(IC_ID, IC_ID_EVENT_BASE + 0x01)
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#define ACRN_MEM_ACCESS_RIGHT_MASK 0x00000007U
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#define ACRN_MEM_ACCESS_READ 0x00000001U
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#define ACRN_MEM_ACCESS_WRITE 0x00000002U
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#define ACRN_MEM_ACCESS_EXEC 0x00000004U
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#define ACRN_MEM_ACCESS_RWX (ACRN_MEM_ACCESS_READ | \
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ACRN_MEM_ACCESS_WRITE | \
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ACRN_MEM_ACCESS_EXEC)
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#define ACRN_MEM_TYPE_MASK 0x000007C0U
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#define ACRN_MEM_TYPE_WB 0x00000040U
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#define ACRN_MEM_TYPE_WT 0x00000080U
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#define ACRN_MEM_TYPE_UC 0x00000100U
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#define ACRN_MEM_TYPE_WC 0x00000200U
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#define ACRN_MEM_TYPE_WP 0x00000400U
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/* Memory mapping types */
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#define ACRN_MEMMAP_RAM 0
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#define ACRN_MEMMAP_MMIO 1
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/**
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* @brief EPT memory mapping info for guest
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*/
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struct acrn_vm_memmap {
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/** memory mapping type */
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__u32 type;
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/** memory mapping attribute */
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__u32 attr;
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/** user OS guest physical start address of memory mapping */
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__u64 user_vm_pa;
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union {
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/** host physical start address of memory,
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* only for type == VM_MMIO
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*/
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__u64 service_vm_pa;
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/** service OS user virtual start address of
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* memory, only for type == VM_MEMMAP_SYSMEM &&
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* using_vma == true
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*/
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__u64 vma_base;
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};
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/** the length of memory range mapped */
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__u64 len;
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};
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/**
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* @brief Info to create or destroy a virtual PCI or legacy device for a VM
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*
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* the parameter for HC_CREATE_VDEV or HC_DESTROY_VDEV hypercall
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*/
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struct acrn_emul_dev {
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/*
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* the identifier of the device, the low 32 bits represent the vendor
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* id and device id of PCI device and the high 32 bits represent the
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* device number of the legacy device
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*/
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union dev_id_info {
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uint64_t value;
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struct fields_info {
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uint16_t vendor_id;
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uint16_t device_id;
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uint32_t legacy_device_number;
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} fields;
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} dev_id;
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/*
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* the slot of the device, if the device is a PCI device, the slot
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* represents BDF, otherwise it represents legacy device slot number
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*/
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uint32_t slot;
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/** reserved for extension */
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uint32_t reserved0;
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/** the IO resource address of the device, initialized by ACRN-DM. */
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uint32_t io_addr[6];
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/** the IO resource size of the device, initialized by ACRN-DM. */
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uint32_t io_size[6];
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/** the options for the virtual device, initialized by ACRN-DM. */
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uint8_t args[128];
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/** reserved for extension */
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uint64_t reserved1[8];
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} __attribute__((aligned(8)));
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/* Type of interrupt of a passthrough device */
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#define ACRN_PTDEV_IRQ_INTX 0
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#define ACRN_PTDEV_IRQ_MSI 1
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#define ACRN_PTDEV_IRQ_MSIX 2
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/**
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* @brief pass thru device irq data structure
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*/
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struct acrn_ptdev_irq {
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/** irq type */
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uint32_t type;
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/** virtual bdf description of pass thru device */
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uint16_t virt_bdf; /* IN: Device virtual BDF# */
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/** physical bdf description of pass thru device */
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uint16_t phys_bdf; /* IN: Device physical BDF# */
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/** info of IOAPIC/PIC interrupt */
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struct {
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/** virtual IOAPIC pin */
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uint32_t virt_pin;
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/** physical IOAPIC pin */
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uint32_t phys_pin;
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/** PIC pin */
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uint32_t is_pic_pin;
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} intx;
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};
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/**
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* @brief data strcture to notify hypervisor ioreq is handled
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*/
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struct acrn_ioreq_notify {
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/** VM id to identify ioreq client */
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__u16 vmid;
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__u16 reserved;
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/** identify the ioreq submitter */
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__u32 vcpu;
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};
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#define ACRN_PLATFORM_LAPIC_IDS_MAX 64
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/**
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* struct acrn_platform_info - Information of a platform from hypervisor
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* @hw.cpu_num: Physical CPU number of the platform
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* @hw.version: Version of this structure
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* @hw.l2_cat_shift: Order of the number of threads sharing L2 cache
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* @hw.l3_cat_shift: Order of the number of threads sharing L3 cache
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* @hw.lapic_ids: IDs of LAPICs of all threads
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* @hw.reserved: Reserved for alignment and should be 0
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* @sw.max_vcpus_per_vm: Maximum number of vCPU of a VM
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* @sw.max_vms: Maximum number of VM
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* @sw.vm_config_size: Size of configuration of a VM
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* @sw.vm_configss_addr: Memory address which user space provided to
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* store the VM configurations
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* @sw.max_kata_containers: Maximum number of VM for Kata containers
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* @sw.reserved: Reserved for alignment and should be 0
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*
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* If vm_configs_addr is provided, the driver uses a bounce buffer (kmalloced
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* for continuous memory region) to fetch VM configurations data from the
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* hypervisor.
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*/
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struct acrn_platform_info {
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struct {
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__u16 cpu_num;
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__u16 version;
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__u32 l2_cat_shift;
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__u32 l3_cat_shift;
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__u8 lapic_ids[ACRN_PLATFORM_LAPIC_IDS_MAX];
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__u8 reserved[52];
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} hw;
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struct {
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__u16 max_vcpus_per_vm;
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__u16 max_vms;
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__u32 vm_config_size;
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void *vm_configs_addr;
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__u64 max_kata_containers;
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__u8 reserved[104];
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} sw;
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};
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struct acrn_ioeventfd {
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#define ACRN_IOEVENTFD_FLAG_PIO 0x01
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#define ACRN_IOEVENTFD_FLAG_DATAMATCH 0x02
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#define ACRN_IOEVENTFD_FLAG_DEASSIGN 0x04
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/** file descriptor of the eventfd of this ioeventfd */
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int32_t fd;
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/** flag for ioeventfd ioctl */
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uint32_t flags;
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/** base address to be monitored */
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uint64_t addr;
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/** address length */
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uint32_t len;
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uint32_t reserved;
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/** data to be matched */
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uint64_t data;
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};
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struct acrn_irqfd {
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#define ACRN_IRQFD_FLAG_DEASSIGN 0x01
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/** file descriptor of the eventfd of this irqfd */
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int32_t fd;
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/** flag for irqfd ioctl */
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uint32_t flags;
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/** MSI interrupt to be injected */
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struct acrn_msi_entry msi;
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};
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#endif /* VHM_IOCTL_DEFS_H */
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