Sainath Grandhi 9ea93ce620 hv: x2APICv support on platforms without support for APICv reg virtualization ... On platforms, that do not support APICv register virtualization, all the x2APIC MSRs need to intercepted by ACRN for emulation. Tracked-On: #1973 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>		2018-12-05 09:21:27 +08:00
..
guest.c	hv: fix 'Space missing before or after binary operator'	2018-12-04 09:16:04 +08:00
instr_emul.c	hv: fixes related to unused API and uninitialized variable	2018-12-04 16:49:49 +08:00
instr_emul.h	hv: guest: fix "Procedure has more than one exit point"	2018-11-29 15:03:48 +08:00
pm.c	hv: guest: fix "Procedure has more than one exit point"	2018-11-29 15:03:48 +08:00
ucode.c	HV:treewide:rename vcpu data structure	2018-11-05 15:35:49 +08:00
vcpu.c	hv: replace CPU_PAGE_SIZE with PAGE_SIZE	2018-12-03 15:14:57 +08:00
vlapic_priv.h	hv: self-IPI APIC register in x2APIC mode of guest vLAPIC	2018-11-02 13:48:43 +08:00
vlapic.c	hv: fix 'Space missing before or after binary operator'	2018-12-04 09:16:04 +08:00
vm.c	hv: fix 'Unused procedure parameter'	2018-12-04 18:28:32 +08:00
vmcall.c	hv: hypercall: clean up HV_DEBUG usage	2018-11-20 10:01:50 +08:00
vmsr.c	hv: x2APICv support on platforms without support for APICv reg virtualization	2018-12-05 09:21:27 +08:00