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https://github.com/projectacrn/acrn-hypervisor.git
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518a82d80b
The init page tables installed in either cpu_primary.S or trampoline.S are 1:1 mapping and won't be changed in the future. The 'actual' hypervisor page table installed in enable_paging() is 1:1 mapping currently but it could be changed in the future. Both hva2hpa() and hpa2hva() are implemented based on these page tables and can't be used when the init page tables take effect. This patch does the following cleanup: - remove all hva2hpa()/hpa2hva() before calling enable_paging() - get_hv_image_base() returns HVA, not HPA. So add hva2hpa() for all cases that are called afte enable_paging(). Tracked-On: #2700 Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <Eddie.dong@intel.com>
127 lines
3.1 KiB
C
127 lines
3.1 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <reloc.h>
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#include <ld_sym.h>
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#ifdef CONFIG_RELOC
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#define DT_NULL 0U /* end of .dynamic section */
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#define DT_RELA 7U /* relocation table */
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#define DT_RELASZ 8U /* size of reloc table */
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#define DT_RELAENT 9U /* size of one entry */
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#define R_X86_64_RELATIVE 8UL
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struct Elf64_Dyn {
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uint64_t d_tag;
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uint64_t d_ptr;
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};
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struct Elf64_Rel {
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uint64_t r_offset;
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uint64_t r_info;
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uint64_t reserved;
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};
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#endif
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static inline uint64_t elf64_r_type(uint64_t i)
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{
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return (i & 0xffffffffUL);
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}
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/* get the delta between CONFIG_HV_RAM_START and the actual load address */
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uint64_t get_hv_image_delta(void)
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{
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uint64_t addr;
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asm volatile (" call 0f\n"
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"0: pop %%rax\n"
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" sub $0b, %%rax\n"
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" mov %%rax, %0\n"
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: "=m" (addr)
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:
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: "%rax");
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return addr;
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}
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/* get the actual Hypervisor load address (HVA) */
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uint64_t get_hv_image_base(void)
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{
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return (get_hv_image_delta() + CONFIG_HV_RAM_START);
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}
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void relocate(void)
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{
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#ifdef CONFIG_RELOC
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struct Elf64_Dyn *dyn;
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struct Elf64_Rel *start = NULL, *end = NULL;
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uint64_t delta, size = 0;
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uint64_t trampoline_end;
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uint64_t primary_32_start, primary_32_end;
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uint64_t *addr;
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/* get the delta that needs to be patched */
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delta = get_hv_image_delta();
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if (delta != 0U) {
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/* Look for the descriptoin of relocation sections */
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for (dyn = (struct Elf64_Dyn *)_DYNAMIC; dyn->d_tag != DT_NULL; dyn++) {
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switch (dyn->d_tag) {
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case DT_RELA:
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start = (struct Elf64_Rel *)(dyn->d_ptr + delta);
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break;
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case DT_RELASZ:
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end = (struct Elf64_Rel *)start + dyn->d_ptr;
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break;
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case DT_RELAENT:
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size = dyn->d_ptr;
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break;
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default:
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/* if no RELA/RELASZ found, both start and end will be initialized to NULL, and later while loop won't be executed */
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break;
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}
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}
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/*
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* Need to subtract the relocation delta to get the correct
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* absolute addresses
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*/
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trampoline_end = (uint64_t)(&ld_trampoline_end) - delta;
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primary_32_start = (uint64_t)(&cpu_primary_start_32) - delta;
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primary_32_end = (uint64_t)(&cpu_primary_start_64) - delta;
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while (start < end) {
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if ((elf64_r_type(start->r_info)) == R_X86_64_RELATIVE) {
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addr = (uint64_t *)(delta + start->r_offset);
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/*
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* we won't fixup any trampoline.S and cpu_primary.S here
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* for a number of reasons:
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*
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* - trampoline code itself takes another relocation,
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* so any entries for trampoline symbols can't be fixed up
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* through .rela sections
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* - In cpu_primary.S, the 32 bits code doesn't need relocation
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* - Linker option "-z noreloc-overflow" could force R_X86_32
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* to R_X86_64 in the relocation sections, which could make
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* the fixed up code dirty. Even if relocation for 32 bits
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* is needed in the future, it's recommended to do it
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* explicitly in the assembly code to avoid confusion.
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*/
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if ((start->r_offset > trampoline_end) &&
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((start->r_offset < primary_32_start) ||
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(start->r_offset > primary_32_end))) {
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*addr += delta;
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}
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}
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start = (struct Elf64_Rel *)((char *)start + size);
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}
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}
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#endif
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}
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