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a1069a5117
There are two different ways the current implementation adopts to access ioapic
RTEs:
1. As two 32-bit registers (typically named ''low'' and ''high''), or
2. As one 64-bit register (typically named ''rte'').
Two issues arise due to the mixed use of these two patterns.
1. Additional conversions are introduced. As an example, ioapic_get_rte()
merges two RTE fragments into a uint64_t, while some callers break it
back to ''low'' and ''high'' again.
2. It is tricky to choose the proper width of IOAPIC_RTE_xxx constants. SOS
boot failure is seen when they are 32-bit due to the following code:
/* reg is uint64_t */
vioapic->rtbl[pin].reg &= ~IOAPIC_RTE_REM_IRR;
while making them 64-bit leads to implicit narrowing when the RTEs are accessed
in the low & high pattern.
This patch defines a union ''ioapic_rte'' and unifies the access pattern
to IOAPIC and vIOAPIC RTEs.
v1 -> v2:
* Instead of two 32-bit ''low'' and ''high'', define a union that allows
either 32-bit or 64-bit accesses to RTEs.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
65 lines
2.5 KiB
C
65 lines
2.5 KiB
C
/*-
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* Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
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* Copyright (c) 2013 Neel Natu <neel@freebsd.org>
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* Copyright (c) 2017 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _VIOAPIC_H_
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#define _VIOAPIC_H_
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#include <apicreg.h>
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#include <vm.h>
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#define VIOAPIC_BASE 0xFEC00000UL
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#define VIOAPIC_SIZE 4096UL
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struct vioapic *vioapic_init(struct vm *vm);
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void vioapic_cleanup(struct vioapic *vioapic);
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void vioapic_reset(struct vioapic *vioapic);
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int vioapic_assert_irq(struct vm *vm, uint32_t irq);
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int vioapic_deassert_irq(struct vm *vm, uint32_t irq);
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int vioapic_pulse_irq(struct vm *vm, uint32_t irq);
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void vioapic_update_tmr(struct vcpu *vcpu);
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int vioapic_mmio_write(void *vm, uint64_t gpa,
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uint64_t wval, int size);
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int vioapic_mmio_read(void *vm, uint64_t gpa,
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uint64_t *rval, int size);
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uint8_t vioapic_pincount(struct vm *vm);
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void vioapic_process_eoi(struct vm *vm, uint32_t vector);
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bool vioapic_get_rte(struct vm *vm, uint8_t pin, union ioapic_rte *rte);
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int vioapic_mmio_access_handler(struct vcpu *vcpu, struct mem_io *mmio,
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void *handler_private_data);
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#ifdef HV_DEBUG
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void get_vioapic_info(char *str, int str_max, uint16_t vmid);
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#endif /* HV_DEBUG */
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#endif
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