mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-04 14:36:55 +00:00
99586e32cc
For data structure types "struct vm", its name is identical with variable name in the same scope. This is a MISRA C violation. Naming convention rule:If the data structure type is used by multi modules, its corresponding logic resource is exposed to external components (such as SOS, UOS), and its name meaning is simplistic (such as vcpu, vm), its name needs prefix "acrn_". The following udpates are made: struct vm *vm-->struct acrn_vm *vm Tracked-On: #861 Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
418 lines
8.6 KiB
C
418 lines
8.6 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <hypervisor.h>
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static inline struct vcpuid_entry *find_vcpuid_entry(const struct acrn_vcpu *vcpu,
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uint32_t leaf_arg, uint32_t subleaf)
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{
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uint32_t i = 0U, nr, half;
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struct vcpuid_entry *entry = NULL;
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struct acrn_vm *vm = vcpu->vm;
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uint32_t leaf = leaf_arg;
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nr = vm->vcpuid_entry_nr;
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half = nr >> 1U;
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if (vm->vcpuid_entries[half].leaf < leaf) {
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i = half;
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}
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for (; i < nr; i++) {
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struct vcpuid_entry *tmp = &vm->vcpuid_entries[i];
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if (tmp->leaf < leaf) {
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continue;
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} else if (tmp->leaf == leaf) {
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if (((tmp->flags & CPUID_CHECK_SUBLEAF) != 0U) &&
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(tmp->subleaf != subleaf)) {
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continue;
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}
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entry = tmp;
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break;
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} else {
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/* tmp->leaf > leaf */
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break;
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}
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}
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if (entry == NULL) {
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uint32_t limit;
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if ((leaf & 0x80000000U) != 0U) {
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limit = vm->vcpuid_xlevel;
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}
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else {
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limit = vm->vcpuid_level;
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}
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if (leaf > limit) {
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/* Intel documentation states that invalid EAX input
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* will return the same information as EAX=cpuid_level
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* (Intel SDM Vol. 2A - Instruction Set Reference -
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* CPUID)
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*/
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leaf = vm->vcpuid_level;
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return find_vcpuid_entry(vcpu, leaf, subleaf);
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}
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}
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return entry;
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}
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static inline int set_vcpuid_entry(struct acrn_vm *vm,
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const struct vcpuid_entry *entry)
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{
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struct vcpuid_entry *tmp;
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size_t entry_size = sizeof(struct vcpuid_entry);
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if (vm->vcpuid_entry_nr == MAX_VM_VCPUID_ENTRIES) {
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pr_err("%s, vcpuid entry over MAX_VM_VCPUID_ENTRIES(%u)\n",
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__func__, MAX_VM_VCPUID_ENTRIES);
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return -ENOMEM;
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}
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tmp = &vm->vcpuid_entries[vm->vcpuid_entry_nr];
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vm->vcpuid_entry_nr++;
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(void)memcpy_s(tmp, entry_size, entry, entry_size);
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return 0;
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}
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/**
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* initialization of virtual CPUID leaf
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*/
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static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf,
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uint32_t flags, struct vcpuid_entry *entry)
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{
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entry->leaf = leaf;
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entry->subleaf = subleaf;
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entry->flags = flags;
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switch (leaf) {
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case 0x07U:
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if (subleaf == 0U) {
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cpuid(leaf,
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&entry->eax, &entry->ebx,
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&entry->ecx, &entry->edx);
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/* mask invpcid */
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entry->ebx &= ~(CPUID_EBX_INVPCID |
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CPUID_EBX_PQM |
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CPUID_EBX_PQE);
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} else {
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entry->eax = 0U;
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entry->ebx = 0U;
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entry->ecx = 0U;
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entry->edx = 0U;
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}
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break;
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case 0x16U:
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if (boot_cpu_data.cpuid_level >= 0x16U) {
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/* call the cpuid when 0x16 is supported */
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cpuid_subleaf(leaf, subleaf,
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&entry->eax, &entry->ebx,
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&entry->ecx, &entry->edx);
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} else {
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/* Use the tsc to derive the emulated 0x16U cpuid. */
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entry->eax = (uint32_t) (tsc_khz / 1000U);
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entry->ebx = entry->eax;
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/* Bus frequency: hard coded to 100M */
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entry->ecx = 100U;
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entry->edx = 0U;
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}
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break;
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/*
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* Leaf 0x40000000
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* This leaf returns the CPUID leaf range supported by the
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* hypervisor and the hypervisor vendor signature.
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*
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* EAX: The maximum input value for CPUID supported by the
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* hypervisor.
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* EBX, ECX, EDX: Hypervisor vendor ID signature.
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*/
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case 0x40000000U:
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{
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static const char sig[12] = "ACRNACRNACRN";
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const uint32_t *sigptr = (const uint32_t *)sig;
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entry->eax = 0x40000010U;
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entry->ebx = sigptr[0];
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entry->ecx = sigptr[1];
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entry->edx = sigptr[2];
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break;
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}
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/*
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* Leaf 0x40000010 - Timing Information.
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* This leaf returns the current TSC frequency and
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* current Bus frequency in kHz.
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*
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* EAX: (Virtual) TSC frequency in kHz.
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* TSC frequency is calculated from PIT in ACRN
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* EBX, ECX, EDX: RESERVED (reserved fields are set to zero).
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*/
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case 0x40000010U:
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entry->eax = tsc_khz;
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entry->ebx = 0U;
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entry->ecx = 0U;
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entry->edx = 0U;
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break;
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default:
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cpuid_subleaf(leaf, subleaf,
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&entry->eax, &entry->ebx,
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&entry->ecx, &entry->edx);
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break;
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}
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}
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int set_vcpuid_entries(struct acrn_vm *vm)
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{
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int result;
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struct vcpuid_entry entry;
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uint32_t limit;
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uint32_t i, j;
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init_vcpuid_entry(0U, 0U, 0U, &entry);
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if (boot_cpu_data.cpuid_level < 0x16U) {
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/* The cpuid with zero leaf returns the max level.
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* Emulate that the 0x16U is supported */
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entry.eax = 0x16U;
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}
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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limit = entry.eax;
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vm->vcpuid_level = limit;
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for (i = 1U; i <= limit; i++) {
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/* cpuid 1/0xb is percpu related */
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if ((i == 1U) || (i == 0xbU)) {
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continue;
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}
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switch (i) {
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case 0x02U:
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{
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uint32_t times;
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init_vcpuid_entry(i, 0U, CPUID_CHECK_SUBLEAF, &entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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times = entry.eax & 0xffUL;
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for (j = 1U; j < times; j++) {
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init_vcpuid_entry(i, j, CPUID_CHECK_SUBLEAF,
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&entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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}
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break;
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}
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case 0x04U:
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case 0x0dU:
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for (j = 0U; ; j++) {
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if ((i == 0x0dU) && (j == 64U)) {
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break;
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}
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init_vcpuid_entry(i, j, CPUID_CHECK_SUBLEAF,
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&entry);
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if ((i == 0x04U) && (entry.eax == 0U)) {
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break;
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}
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if ((i == 0x0dU) && (entry.eax == 0U)) {
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continue;
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}
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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}
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break;
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/* These features are disabled */
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/* PMU is not supported */
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case 0x0aU:
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/* Intel RDT */
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case 0x0fU:
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case 0x10U:
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/* Intel SGX */
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case 0x12U:
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/* Intel Processor Trace */
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case 0x14U:
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break;
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default:
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init_vcpuid_entry(i, 0U, 0U, &entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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break;
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}
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}
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init_vcpuid_entry(0x40000000U, 0U, 0U, &entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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init_vcpuid_entry(0x40000010U, 0U, 0U, &entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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init_vcpuid_entry(0x80000000U, 0U, 0U, &entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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limit = entry.eax;
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vm->vcpuid_xlevel = limit;
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for (i = 0x80000001U; i <= limit; i++) {
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init_vcpuid_entry(i, 0U, 0U, &entry);
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result = set_vcpuid_entry(vm, &entry);
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if (result != 0) {
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return result;
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}
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}
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return 0;
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}
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void guest_cpuid(struct acrn_vcpu *vcpu,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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{
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uint32_t leaf = *eax;
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uint32_t subleaf = *ecx;
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/* vm related */
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if ((leaf != 0x1U) && (leaf != 0xbU) && (leaf != 0xdU)) {
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struct vcpuid_entry *entry =
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find_vcpuid_entry(vcpu, leaf, subleaf);
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if (entry != NULL) {
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*eax = entry->eax;
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*ebx = entry->ebx;
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*ecx = entry->ecx;
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*edx = entry->edx;
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} else {
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*eax = 0U;
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*ebx = 0U;
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*ecx = 0U;
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*edx = 0U;
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}
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return;
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}
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/* percpu related */
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switch (leaf) {
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case 0x01U:
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{
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cpuid(leaf, eax, ebx, ecx, edx);
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uint32_t apicid = vlapic_get_apicid(vcpu_vlapic(vcpu));
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/* Patching initial APIC ID */
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*ebx &= ~APIC_ID_MASK;
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*ebx |= (apicid << APIC_ID_SHIFT);
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#ifndef CONFIG_MTRR_ENABLED
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/* mask mtrr */
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*edx &= ~CPUID_EDX_MTRR;
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#endif
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/* mask pcid */
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*ecx &= ~CPUID_ECX_PCID;
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/*mask vmx to guest os */
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*ecx &= ~CPUID_ECX_VMX;
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/*no xsave support for guest if it is not enabled on host*/
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if ((*ecx & CPUID_ECX_OSXSAVE) == 0U) {
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*ecx &= ~CPUID_ECX_XSAVE;
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}
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*ecx &= ~CPUID_ECX_OSXSAVE;
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if ((*ecx & CPUID_ECX_XSAVE) != 0U) {
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uint64_t cr4;
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/*read guest CR4*/
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cr4 = exec_vmread(VMX_GUEST_CR4);
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if ((cr4 & CR4_OSXSAVE) != 0UL) {
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*ecx |= CPUID_ECX_OSXSAVE;
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}
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}
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break;
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}
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case 0x0bU:
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/* Patching X2APIC */
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#ifdef CONFIG_PARTITION_MODE
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cpuid_subleaf(leaf, subleaf, eax, ebx, ecx, edx);
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#else
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if (is_vm0(vcpu->vm)) {
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cpuid_subleaf(leaf, subleaf, eax, ebx, ecx, edx);
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} else {
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*ecx = subleaf & 0xFFU;
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*edx = vlapic_get_apicid(vcpu_vlapic(vcpu));
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/* No HT emulation for UOS */
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switch (subleaf) {
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case 0U:
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*eax = 0U;
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*ebx = 1U;
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*ecx |= (1U << 8U);
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break;
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case 1U:
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if (vcpu->vm->hw.created_vcpus == 1U) {
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*eax = 0U;
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} else {
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*eax = (uint32_t)fls32(vcpu->vm->hw.created_vcpus - 1U) + 1U;
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}
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*ebx = vcpu->vm->hw.created_vcpus;
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*ecx |= (2U << 8U);
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break;
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default:
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*eax = 0U;
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*ebx = 0U;
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*ecx |= (0U << 8U);
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break;
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}
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}
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#endif
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break;
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case 0x0dU:
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if (!cpu_has_cap(X86_FEATURE_OSXSAVE)) {
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*eax = 0U;
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*ebx = 0U;
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*ecx = 0U;
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*edx = 0U;
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} else {
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cpuid_subleaf(leaf, subleaf, eax, ebx, ecx, edx);
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}
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break;
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default:
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/*
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* In this switch statement, leaf shall either be 0x01U or 0x0bU
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* or 0x0dU. All the other cases have been handled properly
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* before this switch statement.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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}
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