Yin Fengwei d0e06c4f80 hv: debug: Enable MMIO UART support ... New board, EHL CRB, does not have legacy port IO UART. Even the PCI UART are not work due to BIOS's bug workaround(the BARs on LPSS PCI are reset after BIOS hand over control to OS). For ACRN console usage, expose the debug UART via ACPI PnP device (access by MMIO) and add support in hypervisor debug code. Another special thing is that register width of UART of EHL CRB is 1byte. Introduce reg_width for each struct console_uart. Tracked-On: #4937 Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>		2020-08-27 13:31:17 +08:00
..
console.c	HV: remove DBG_LEVEL_PARSE	2020-02-26 09:24:16 +08:00
dbg_cmd.c	hv: debug: Enable MMIO UART support	2020-08-27 13:31:17 +08:00
dump.c	cleanup spin lock in irq.c	2020-06-19 16:13:20 +08:00
hypercall.c	refine hypercall	2020-08-26 14:55:24 +08:00
logmsg.c	HV: explicitly init lock variable before using it	2020-05-26 10:26:59 +08:00
Makefile	HV: makefile: to avoid duplicated build libs	2020-05-21 15:12:21 +08:00
npk_log.c	hv: refine 'uint64_t' string print format in debug moudle	2019-11-09 11:42:38 +08:00
printf.c	hv:cleanup header files for debug folder	2019-02-27 11:12:48 +08:00
profiling.c	hv: move error message logging into gpa copy APIs	2020-03-30 13:19:01 +08:00
sbuf.c	HV: fix sbuf "Casting operation to a pointer"	2019-07-11 13:57:21 +08:00
shell_priv.h	hv:add dump_guest_mem	2019-11-26 10:58:19 +08:00
shell.c	HV: add board and scenario info in log	2020-06-18 13:05:42 +08:00
string.c	hv:cleanup header files for debug folder	2019-02-27 11:12:48 +08:00
trace.c	HV: fix sbuf "Casting operation to a pointer"	2019-07-11 13:57:21 +08:00
uart16550.c	hv: debug: Enable MMIO UART support	2020-08-27 13:31:17 +08:00