Files
acrn-hypervisor/hypervisor/arch/riscv/boot
Jian Jun Chen 6f97ad9fc9 hv: risc-v: add assembly code for BSP and AP boot
The following tasks are done for both BSP and APs:
- Mask all interrupts
- Disable FPU
- Setup stack
- Jump to the C entry of BSP/AP initialization

Additionally, clear BSS sections during BSP boot before
jumping to the C entry point.

Tracked-On: #8788
Signed-off-by: Haicheng Li <haicheng.li@intel.com>
Co-developed-by: Haicheng Li <haicheng.li@intel.com>
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-15 13:12:21 +08:00
..