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https://github.com/projectacrn/acrn-hypervisor.git
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a436f72493
Add pre_user_access() and post_user_access() interfaces to protect mmio from hypervisor accidental access, SMAP extensiton need to be detected Tracked-On: #8831 Signed-off-by: hangliu1 <hang1.liu@intel.com> Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
148 lines
4.1 KiB
C
148 lines
4.1 KiB
C
/*
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* Copyright (C) 2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef COMMON_CPU_H
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#define COMMON_CPU_H
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#include <types.h>
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#include <asm/cpu.h>
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#define CPU_UP_TIMEOUT 100U /* millisecond */
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#define CPU_DOWN_TIMEOUT 100U /* millisecond */
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#define BSP_CPU_ID 0U /* Boot CPU ID */
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/**
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* The invalid cpu_id (INVALID_CPU_ID) is error code for error handling,
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* this means that caller can't find a valid physical cpu or virtual cpu.
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*/
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#define INVALID_CPU_ID 0xffffU
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/* hypervisor stack bottom magic('intl') */
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#define SP_BOTTOM_MAGIC 0x696e746cUL
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#ifndef ASSEMBLER
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/* CPU states defined */
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enum pcpu_boot_state {
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PCPU_STATE_RESET = 0U,
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PCPU_STATE_INITIALIZING,
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PCPU_STATE_RUNNING,
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PCPU_STATE_HALTED,
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PCPU_STATE_DEAD,
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};
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static inline uint16_t arch_get_pcpu_id(void);
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static inline void arch_set_current_pcpu_id(uint16_t pcpu_id);
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void arch_start_pcpu(uint16_t pcpu_id);
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static inline void arch_asm_pause(void);
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uint16_t arch_get_pcpu_num(void);
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uint16_t get_pcpu_nums(void);
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bool is_pcpu_active(uint16_t pcpu_id);
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void set_pcpu_active(uint16_t pcpu_id);
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void clear_pcpu_active(uint16_t pcpu_id);
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bool check_pcpus_active(uint64_t mask);
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bool check_pcpus_inactive(uint64_t mask);
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uint64_t get_active_pcpu_bitmap(void);
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void pcpu_set_current_state(uint16_t pcpu_id, enum pcpu_boot_state state);
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bool start_pcpus(uint64_t mask);
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void arch_cpu_dead(void);
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void cpu_dead(void);
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void arch_cpu_do_idle(void);
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static inline void arch_pre_user_access(void);
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static inline void arch_post_user_access(void);
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#define ALL_CPUS_MASK ((1UL << get_pcpu_nums()) - 1UL)
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#define AP_MASK (ALL_CPUS_MASK & ~(1UL << BSP_CPU_ID))
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static inline uint16_t get_pcpu_id(void)
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{
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return arch_get_pcpu_id();
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}
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static inline void set_current_pcpu_id(uint16_t pcpu_id)
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{
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arch_set_current_pcpu_id(pcpu_id);
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}
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static inline void asm_pause(void)
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{
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arch_asm_pause();
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}
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static inline void cpu_do_idle(void)
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{
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arch_cpu_do_idle();
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}
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/* The mandatory functions should be implemented by arch. */
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static inline void arch_local_irq_enable(void);
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static inline void arch_local_irq_disable(void);
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static inline void arch_local_irq_save(uint64_t *flags_ptr);
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static inline void arch_local_irq_restore(uint64_t flags);
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/*
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* pre_user_access/post_user_access pair is used to access guest's memory protected by SMAP,
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* following below flow:
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*
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* pre_user_access();
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* #access guest's memory.
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* post_user_access();
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*
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* Notes:Avoid inserting another pre_user_access/post_user_access pair between pre_user_access
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* and post_user_access, As once post_user_access after multiple pre_user_access will
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* invalidate SMAP protection and hence Page Fault crash.
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* Logging message to memory buffer will induce this case,
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* please disable SMAP temporlly or don't log messages to shared
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* memory buffer, if it is evitable for you for debug purpose.
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*/
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static inline void pre_user_access(void)
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{
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arch_pre_user_access();
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}
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static inline void post_user_access(void)
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{
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arch_post_user_access();
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}
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static inline void local_irq_enable(void)
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{
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arch_local_irq_enable();
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}
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static inline void local_irq_disable(void)
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{
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arch_local_irq_disable();
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}
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/* This function locks out interrupts and saves the current architecture status
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* register / state register to the specified address. This function does not
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* attempt to mask any bits in the return register value and can be used as a
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* quick method to guard a critical section.
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* NOTE: This function is used in conjunction with local_irq_restore().
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*/
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static inline void local_irq_save(uint64_t *flags_ptr){
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arch_local_irq_save(flags_ptr);
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}
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/* This function restores the architecture status / state register used to lockout
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* interrupts to the value provided. The intent of this function is to be a
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* fast mechanism to restore the interrupt level at the end of a critical
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* section to its original level.
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* NOTE: This function is used in conjunction with local_irq_save().
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*/
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static inline void local_irq_restore(uint64_t flags)
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{
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arch_local_irq_restore(flags);
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}
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void print_hv_banner(void);
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#endif /* ASSEMBLER */
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#endif /* COMMON_CPU_H */
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