mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-16 04:09:37 +00:00
183ca5d175
V4:
- Moved error checking to vdev_hostbridge_cfgwrite/vdev_hostbridge_cfgread
V3:
- Unified ops calling and implemented deinit/cfgwrite/cfgread ops,
previously only init op is implemented
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
102 lines
2.8 KiB
C
102 lines
2.8 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef VPCI_H_
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#define VPCI_H_
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#define PCI_BAR_COUNT 0x6U
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#define PCI_REGMAX 0xFFU
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#define PCIM_BAR_MEM_32 0U
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#define PCIM_BAR_MEM_64 4U
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#define PCI_BDF(b, d, f) (((b & 0xFFU) << 8) \
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| ((d & 0x1FU) << 3) | ((f & 0x7U)))
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#define ALIGN_UP(x, y) (((x)+((y)-1))&(~((y)-1U)))
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#define ALIGN_UP_4K(x) ALIGN_UP(x, 4096)
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struct pci_vdev;
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struct pci_vdev_ops {
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int (*init)(struct pci_vdev *vdev);
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int (*deinit)(struct pci_vdev *vdev);
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int (*cfgwrite)(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t val);
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int (*cfgread)(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t *val);
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};
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struct pcibar {
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uint64_t base;
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uint64_t size;
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uint8_t type;
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};
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struct pci_pdev {
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/* The bar info of the physical PCI device. */
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struct pcibar bar[PCI_BAR_COUNT];
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/* The bus/device/function triple of the physical PCI device. */
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uint16_t bdf;
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};
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struct pci_vdev {
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struct pci_vdev_ops *ops;
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struct vpci *vpci;
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/* The bus/device/function triple of the virtual PCI device. */
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uint16_t vbdf;
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struct pci_pdev pdev;
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uint8_t cfgdata[PCI_REGMAX + 1U];
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/* The bar info of the virtual PCI device. */
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struct pcibar bar[PCI_BAR_COUNT];
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};
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struct pci_addr_info {
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uint16_t cached_bdf;
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uint32_t cached_reg, cached_enable;
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};
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struct vpci {
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struct vm *vm;
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struct pci_addr_info addr_info;
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};
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extern struct pci_vdev_ops pci_ops_vdev_hostbridge;
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extern struct pci_vdev_ops pci_ops_vdev_pt;
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void vpci_init(struct vm *vm);
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void vpci_cleanup(struct vm *vm);
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#endif /* VPCI_H_ */
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