Xiaoguang Wu 122685b7b9 DM USB: xHCI: refine the failure process logic of control transfer ...

The old logic to process control transfer failure only include two cases:
1 Short packet
2 Stall.
This patch includes all possible failures reported by Libusb and does
related emulation for UOS

Tracked-On: #2918
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>

2019-04-11 20:05:20 +08:00

..

pci

DM USB: xHCI: refine the failure process logic of control transfer

2019-04-11 20:05:20 +08:00

platform

DM USB: xHCI: refine the failure process logic of control transfer

2019-04-11 20:05:20 +08:00

block_if.c

dm: safely use pthread_cond_broadcast()

2019-04-04 00:27:10 +08:00

uart_core.c

DM: Mark thre_int_pending as true when THR is empty

2019-03-14 16:37:41 +08:00

usb_core.c

DM USB: add usb_dev_path_cmp function for convenience

2018-12-14 19:40:44 +08:00