acrn-hypervisor/hypervisor/arch/x86
Yonghua Huang a6e666dbe7 hv: remove hardcoding of SW SRAM HPA base
Physical address to SW SRAM region maybe different
 on different platforms, this hardcoded address may
 result in address mismatch for SW SRAM operations.

 This patch removes above hardcoded address and uses
 the physical address parsed from native RTCT.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-01-28 11:29:25 +08:00
..
boot hv: modularization: remove global variable efiloader_sig. 2021-01-27 15:59:47 +08:00
configs acrn-config: refactor pci_dev_c.py and insert vuart device information 2020-10-30 20:24:28 +08:00
guest hv: remove hardcoding of SW SRAM HPA base 2021-01-28 11:29:25 +08:00
lib HV: rewrite memcpy_s to be iso c11 compliant 2020-06-08 13:30:04 +08:00
seed hv: modularization: change of multiboot API. 2021-01-27 15:59:47 +08:00
cpu_caps.c hv: Add split-lock emulation for LOCK prefix instruction 2020-12-31 11:12:33 +08:00
cpu_state_tbl.c HV: add board specific cpu state table to support Px Cx 2019-07-29 20:25:16 +08:00
cpu.c hv: cleanup legacy terminologies in RTCM module 2021-01-28 11:29:25 +08:00
e820.c hv: modularization: change of multiboot API. 2021-01-27 15:59:47 +08:00
gdt.c hv:cleanup header files for arch folder 2019-02-22 13:14:36 +08:00
idt.S HV: Install a NMI handler in acrn IDT 2019-12-13 10:13:09 +08:00
init.c hv: modularization: remove global variable efiloader_sig. 2021-01-27 15:59:47 +08:00
ioapic.c hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit 2020-11-02 10:29:43 +08:00
irq.c hv: coding style clean-up related to Boolean 2020-11-28 14:51:32 +08:00
Kconfig hv: cleanup legacy terminologies in RTCM module 2021-01-28 11:29:25 +08:00
lapic.c hv:cpu-caps:refine processor family and model info 2020-08-14 10:08:50 +08:00
mmu.c hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit 2020-11-02 10:29:43 +08:00
notify.c hv: maintain a per-pCPU array of vCPUs and handle posted interrupt IRQs 2020-04-15 13:47:22 +08:00
page.c hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit 2020-11-02 10:29:43 +08:00
pagetable.c hv: mmu: release 1GB cpu side support constrain 2020-06-15 15:16:34 +08:00
platform_caps.c hv: add function to check if using posted interrupt is possible for vm 2020-04-15 13:47:22 +08:00
pm.c pm: S5: update the system shutdown logical in ACRN 2019-12-23 15:15:09 +08:00
rdt.c hv: coding style clean-up related to Boolean 2020-11-28 14:51:32 +08:00
rtcm.c hv: remove hardcoding of SW SRAM HPA base 2021-01-28 11:29:25 +08:00
sched.S hv: sched: rename schedule related structs and vars 2019-10-16 10:25:53 +08:00
security.c hv:cpu-caps:refine processor family and model info 2020-08-14 10:08:50 +08:00
sgx.c hv: sgx: add basic support to init sgx resource for vm 2019-05-29 11:24:13 +08:00
timer.c hv: list: rename list_entry to container_of 2020-03-31 10:57:47 +08:00
trampoline.c hv: modularization: avoid dependency of multiboot on zeropage.h. 2021-01-27 15:59:47 +08:00
vmx.c hv:fix "no prototype for non-static function" 2019-07-09 10:36:03 +08:00
vtd.c hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit 2020-11-02 10:29:43 +08:00
wakeup.S hv: pm: correct the function name 2019-09-11 17:30:24 +08:00