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3cf1daa480
The vbar info which hard-coded in scenarios/logical_partition/pt_dev.c is board specific actually, so move these information to arch/x86/configs/$(CONFIG_BOARD)/pci_devices.h. Please be aware that the memory range of vBAR should exactly match with the e820 layout of VM. Tracked-On: #3214 Signed-off-by: Victor Sun <victor.sun@intel.com>
27 lines
799 B
C
27 lines
799 B
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PCI_DEVICES_H_
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#define PCI_DEVICES_H_
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#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}
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#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U}, \
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.vbar_base[0] = 0xdf248000UL, \
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.vbar_base[1] = 0xdf24c000UL, \
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.vbar_base[5] = 0xdf24b000UL
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#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U}, \
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.vbar_base[0] = 0xdf230000UL
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#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1fU, .f = 0x06U}, \
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.vbar_base[0] = 0xdf200000UL
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#define NETWORK_CONTROLLER_0 .pbdf.bits = {.b = 0x10U, .d = 0x00U, .f = 0x00U}, \
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.vbar_base[0] = 0xdf100000UL
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#endif /* PCI_DEVICES_H_ */
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