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cbab9cbab8
Add arch_hva2hpa_early/arch_hpa2hva_early to common, and wrap it in hva2hpa_early/hpa2hva_early. Tracked-On: #8831 Signed-off-by: hangliu1 <hang1.liu@intel.com> Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
154 lines
2.9 KiB
C
154 lines
2.9 KiB
C
/*
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* Copyright (C) 2018-2024 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PGTABLE_H
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#define PGTABLE_H
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#include <asm/page.h>
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/**
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* @addtogroup hwmgmt_page
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*
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* @{
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*/
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/**
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* @file
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* @brief All APIs to support page table management
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*
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* This file defines macros, structures, declarations and functions related for managing page tables.
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*
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*/
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#define PAGE_PRESENT (1UL << 0U)
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#define PAGE_RW (1UL << 1U)
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#define PAGE_USER (1UL << 2U)
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#define PAGE_PWT (1UL << 3U)
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#define PAGE_PCD (1UL << 4U)
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#define PAGE_ACCESSED (1UL << 5U)
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#define PAGE_DIRTY (1UL << 6U)
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#define PAGE_PSE (1UL << 7U)
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#define PAGE_GLOBAL (1UL << 8U)
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#define PAGE_PAT_LARGE (1UL << 12U)
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#define PAGE_NX (1UL << 63U)
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#define PAGE_CACHE_MASK (PAGE_PCD | PAGE_PWT)
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#define PAGE_CACHE_WB 0UL
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#define PAGE_CACHE_WT PAGE_PWT
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#define PAGE_CACHE_UC_MINUS PAGE_PCD
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#define PAGE_CACHE_UC (PAGE_PCD | PAGE_PWT)
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#define PAGE_ATTR_USER (PAGE_PRESENT | PAGE_RW | PAGE_USER | PAGE_NX)
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/**
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* @defgroup ept_mem_access_right EPT Memory Access Right
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*
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* This is a group that includes EPT Memory Access Right Definitions.
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*
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* @{
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*/
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/**
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* @brief EPT memory access right is read-only.
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*/
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#define EPT_RD (1UL << 0U)
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/**
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* @brief EPT memory access right is read/write.
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*/
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#define EPT_WR (1UL << 1U)
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/**
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* @brief EPT memory access right is executable.
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*/
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#define EPT_EXE (1UL << 2U)
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/**
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* @brief EPT memory access right is read/write and executable.
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*/
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#define EPT_RWX (EPT_RD | EPT_WR | EPT_EXE)
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/**
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* @}
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*/
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/* End of ept_mem_access_right */
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/**
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* @defgroup ept_mem_type EPT Memory Type
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*
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* This is a group that includes EPT Memory Type Definitions.
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*
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* @{
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*/
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/**
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* @brief EPT memory type is specified in bits 5:3 of the EPT paging-structure entry.
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*/
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#define EPT_MT_SHIFT 3U
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/**
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* @brief EPT memory type is uncacheable.
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*/
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#define EPT_UNCACHED (0UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write combining.
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*/
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#define EPT_WC (1UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write through.
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*/
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#define EPT_WT (4UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write protected.
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*/
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#define EPT_WP (5UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write back.
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*/
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#define EPT_WB (6UL << EPT_MT_SHIFT)
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/**
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* @brief Ignore PAT memory type.
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*/
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#define EPT_IGNORE_PAT (1UL << 6U)
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/**
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* @}
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*/
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/* End of ept_mem_type */
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#define EPT_MT_MASK (7UL << EPT_MT_SHIFT)
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#define EPT_VE (1UL << 63U)
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/* EPT leaf entry bits (bit 52 - bit 63) should be maksed when calculate PFN */
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#define EPT_PFN_HIGH_MASK 0xFFF0000000000000UL
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#define PML4E_SHIFT 39U
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#define PTRS_PER_PML4E 512UL
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#define PDPTE_SHIFT 30U
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#define PTRS_PER_PDPTE 512UL
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#define PDE_SHIFT 21U
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#define PTRS_PER_PDE 512UL
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#define PTE_SHIFT 12U
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#define PTRS_PER_PTE 512UL
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#define PFN_MASK 0x0000FFFFFFFFF000UL
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#define EPT_ENTRY_PFN_MASK ((~EPT_PFN_HIGH_MASK) & PAGE_MASK)
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#define HAS_EARLY_MAP
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#endif /* PGTABLE_H */
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/**
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* @}
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*/
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