Binbin Wu 6c05af8ded hv: ptirq : fix a bug in ptirq_release_entry ...

The mask valuei 0x3F was added to prevent out of range in array access.
However, it should not be hardcoded.
Since in ptirq_alloc_entry_id, the valid allocated id is no greater
than CONFIG_MAX_PT_IRQ_ENTRIES, it will not cause out of range array
access without mask.
So this patch removes the mask.

Also, use bitmap_clear_lock instead of bitmap_clear_nolock becuase there
could be the chance that more than 1 core to access a same 64bit var.

Tracked-On: #4828
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

2020-05-21 15:24:25 +08:00

..

event.c

hv: reset vcpu events in reset_vcpu

2020-02-23 16:27:57 +08:00

hv_main.c

hv:cleanup vcpu state

2020-05-21 15:08:49 +08:00

hypercall.c

hv:cleanup vcpu state

2020-05-21 15:08:49 +08:00

ptdev.c

hv: ptirq : fix a bug in ptirq_release_entry

2020-05-21 15:24:25 +08:00

sched_bvt.c

hv: list: rename list_entry to container_of

2020-03-31 10:57:47 +08:00

sched_iorr.c

hv: sched_iorr: add some interfaces implementation of sched_iorr

2019-12-11 09:31:39 +08:00

sched_noop.c

hv: sched: decouple scheduler from schedule framework

2019-10-25 13:00:21 +08:00

schedule.c

hv: sched_bvt: add BVT scheduler

2020-02-25 09:11:32 +08:00

softirq.c

…

trusty_hypercall.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

vm_load.c

gpa2hva: add INVAVLID_HPA return value check

2020-05-06 11:29:30 +08:00