acrn-hypervisor/hypervisor/arch/x86/guest
Zide Chen a958fea7a4 hv: emulate IA32_TSC_ADJUST MSR
Intercept IA32_TSC_ADJUST MSR so that writing IA32_TSC_ADJUST from the
guests won't impact the TSC in root mode or potentially other vCPUs in
the same pCPU.

- MSR TSC_ADJUST needs to be isolated between normal and secure world,
  so it's included in NUM_WORLD_MSRS.
- Upon writing to either IA32_TSC_ADJUST or IA32_TSC from the guests,
  don't write to physical MSRS so it won't impact the host side, but
  update the TSC offset VM-execution control.
- don't need to intercept rdmsr for IA32_TIME_STAMP_COUNTER.
- add the missing statement in save_world_ctx() to save the tsc_offset
  during world switch.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 09:11:37 +08:00
..
guest.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
instr_emul.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
instr_emul.h hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
pm.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
ucode.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
vcpu.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
vcpuid.c modulization: move virtual cpuid stuff into guest dir 2018-12-13 09:08:02 +08:00
vlapic_priv.h hv: self-IPI APIC register in x2APIC mode of guest vLAPIC 2018-11-02 13:48:43 +08:00
vlapic.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
vm.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
vmcall.c hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
vmsr.c hv: emulate IA32_TSC_ADJUST MSR 2018-12-14 09:11:37 +08:00