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https://github.com/projectacrn/acrn-hypervisor.git
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a5e46a70ff
This patch:
- abstracts the common logic from existing x86 implementation
- moves x86-specific logic to arch/x86/notify.c
A new common/notify.{c,h} is introduced to provide a common SMP call framework for
multi-arch support in ACRN.
arch-specific files such as arch/{x86,riscv}/notify.c is aim to provide the
corresponding implementations respectively.
The framework provides the following common APIs:
- init_smp_call(): initialize the SMP call support during pCPU initialization
- handle_smp_call(): execute the SMP call notification handler
- smp_call_function(): trigger the SMP call request to target pCPUs
Other SW modules should invoke these common APIs to perform arch-independent
SMP operations.
Two arch-specific hooks are abstracted:
- arch_smp_call_kick_pcpu():
- On x86, special handling is required when LAPIC is passthrough.
- On RISC-V, a plain IPI is sufficient to kick the target pCPU.
- arch_init_smp_call():
- On x86, CPU initialization reserves dedicated vectors and
registers callback handlers for purposes such as notifications
or posted interrupts.
- On RISC-V, no special handling is required at present; this
can be extended in the future if needed.
----------
Changelog:
* Merged the following two patches into one:
[RFC PATCH v2 4/7] hv: introduce common/smp.{c,h}
[RFC PATCH v2 5/7] hv: smpcall: x86: adapt to common SMP call
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
97 lines
2.2 KiB
C
97 lines
2.2 KiB
C
/*
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* Copyright (C) 2018-2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <errno.h>
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#include <asm/lib/bits.h>
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#include <asm/lib/atomic.h>
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#include <asm/irq.h>
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#include <asm/cpu.h>
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#include <asm/per_cpu.h>
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#include <asm/lapic.h>
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#include <asm/guest/vm.h>
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#include <asm/guest/virq.h>
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#include <common/notify.h>
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static uint32_t notification_irq = IRQ_INVALID;
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static int32_t request_notification_irq(irq_action_t func, void *data)
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{
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int32_t retval;
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if (notification_irq != IRQ_INVALID) {
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pr_info("%s, Notification vector already allocated on this CPU", __func__);
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retval = -EBUSY;
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} else {
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/* all cpu register the same notification vector */
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retval = request_irq(NOTIFY_VCPU_IRQ, func, data, IRQF_NONE);
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if (retval < 0) {
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pr_err("Failed to add notify isr");
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retval = -ENODEV;
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} else {
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notification_irq = (uint32_t)retval;
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}
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}
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return retval;
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}
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/*
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* @pre be called only by BSP initialization process
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*/
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static void setup_notification(void)
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{
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/* support IPI notification, Service VM will register all CPU */
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if (request_notification_irq(kick_notification, NULL) < 0) {
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pr_err("Failed to setup notification");
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}
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dev_dbg(DBG_LEVEL_PTIRQ, "NOTIFY: irq[%d] setup vector %x",
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notification_irq, irq_to_vector(notification_irq));
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}
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/*
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* posted interrupt handler
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* @pre (irq - POSTED_INTR_IRQ) < CONFIG_MAX_VM_NUM
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*/
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static void handle_pi_notification(uint32_t irq, __unused void *data)
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{
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uint32_t vcpu_index = irq - POSTED_INTR_IRQ;
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ASSERT(vcpu_index < CONFIG_MAX_VM_NUM, "");
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vcpu_handle_pi_notification(vcpu_index);
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}
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/*pre-condition: be called only by BSP initialization proccess*/
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static void setup_pi_notification(void)
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{
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uint32_t i;
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for (i = 0U; i < CONFIG_MAX_VM_NUM; i++) {
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if (request_irq(POSTED_INTR_IRQ + i, handle_pi_notification, NULL, IRQF_NONE) < 0) {
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pr_err("Failed to setup pi notification");
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break;
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}
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}
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}
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void arch_init_smp_call(void)
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{
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setup_notification();
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setup_pi_notification();
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}
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void arch_smp_call_kick_pcpu(uint16_t pcpu_id)
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{
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struct acrn_vcpu *vcpu = get_ever_run_vcpu(pcpu_id);
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if ((vcpu != NULL) && (is_lapic_pt_enabled(vcpu))) {
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vcpu_make_request(vcpu, ACRN_REQUEST_SMP_CALL);
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} else {
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arch_send_single_ipi(pcpu_id, NOTIFY_VCPU_VECTOR);
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}
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}
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