mirror of
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`@return` is dedicated for brief description of return values, not for comments stating actual return values. In addition, sphinx + breathe does not join multiple adjacent `@return`. This results in multiple `Return` sections in the generated document, which is confusing. This patch replaces `@return` with `@retval` for the lists of return values. Adjacent `@retval` can be joined into one list by breathe. v1 -> v2: * Replace return value descriptions like `negative` and `positive` with expressions like `<0` and `>0` in `@retval`. * Keep the list of `@retval` comprehensive, even when there is a `@return` to generally describe what the return value means. * Drop duplicated `@return` when it does not give more information than the `@retval` list. Tracked-On: #1595 Signed-off-by: Junjie Mao <junjie.mao@intel.com>
609 lines
14 KiB
C
609 lines
14 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/**
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* @file vcpu.h
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*
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* @brief public APIs for vcpu operations
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*/
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#ifndef VCPU_H
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#define VCPU_H
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#define ACRN_VCPU_MMIO_COMPLETE (0U)
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/* Number of GPRs saved / restored for guest in VCPU structure */
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#define NUM_GPRS 16U
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#define GUEST_STATE_AREA_SIZE 512
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#define CPU_CONTEXT_OFFSET_RAX 0U
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#define CPU_CONTEXT_OFFSET_RCX 8U
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#define CPU_CONTEXT_OFFSET_RDX 16U
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#define CPU_CONTEXT_OFFSET_RBX 24U
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#define CPU_CONTEXT_OFFSET_RSP 32U
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#define CPU_CONTEXT_OFFSET_RBP 40U
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#define CPU_CONTEXT_OFFSET_RSI 48U
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#define CPU_CONTEXT_OFFSET_RDI 56U
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#define CPU_CONTEXT_OFFSET_R8 64U
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#define CPU_CONTEXT_OFFSET_R9 72U
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#define CPU_CONTEXT_OFFSET_R10 80U
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#define CPU_CONTEXT_OFFSET_R11 88U
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#define CPU_CONTEXT_OFFSET_R12 96U
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#define CPU_CONTEXT_OFFSET_R13 104U
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#define CPU_CONTEXT_OFFSET_R14 112U
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#define CPU_CONTEXT_OFFSET_R15 120U
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#define CPU_CONTEXT_OFFSET_CR0 128U
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#define CPU_CONTEXT_OFFSET_CR2 136U
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#define CPU_CONTEXT_OFFSET_CR4 144U
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#define CPU_CONTEXT_OFFSET_RIP 152U
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#define CPU_CONTEXT_OFFSET_RFLAGS 160U
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#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 168U
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#define CPU_CONTEXT_OFFSET_IA32_EFER 176U
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#define CPU_CONTEXT_OFFSET_EXTCTX_START 184U
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#define CPU_CONTEXT_OFFSET_CR3 184U
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#define CPU_CONTEXT_OFFSET_IDTR 192U
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#define CPU_CONTEXT_OFFSET_LDTR 216U
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/*sizes of various registers within the VCPU data structure */
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#define VMX_CPU_S_FXSAVE_GUEST_AREA_SIZE GUEST_STATE_AREA_SIZE
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#ifndef ASSEMBLER
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#include <guest.h>
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/**
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* @brief vcpu
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*
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* @defgroup acrn_vcpu ACRN vcpu
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* @{
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*/
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enum vcpu_state {
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VCPU_INIT,
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VCPU_RUNNING,
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VCPU_PAUSED,
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VCPU_ZOMBIE,
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VCPU_OFFLINE,
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VCPU_UNKNOWN_STATE,
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};
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enum vm_cpu_mode {
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CPU_MODE_REAL,
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CPU_MODE_PROTECTED,
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CPU_MODE_COMPATIBILITY, /* IA-32E mode (CS.L = 0) */
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CPU_MODE_64BIT, /* IA-32E mode (CS.L = 1) */
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};
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struct segment_sel {
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uint16_t selector;
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uint64_t base;
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uint32_t limit;
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uint32_t attr;
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};
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/**
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* @brief registers info saved for vcpu running context
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*/
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struct run_context {
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/* Contains the guest register set.
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* NOTE: This must be the first element in the structure, so that the offsets
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* in vmx_asm.S match
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*/
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union guest_cpu_regs_t {
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struct acrn_gp_regs regs;
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uint64_t longs[NUM_GPRS];
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} guest_cpu_regs;
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/** The guests CR registers 0, 2, 3 and 4. */
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uint64_t cr0;
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/* CPU_CONTEXT_OFFSET_CR2 =
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* offsetof(struct run_context, cr2) = 136
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*/
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uint64_t cr2;
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uint64_t cr4;
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uint64_t rip;
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uint64_t rflags;
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/* CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL =
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* offsetof(struct run_context, ia32_spec_ctrl) = 168
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*/
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uint64_t ia32_spec_ctrl;
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uint64_t ia32_efer;
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};
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/*
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* extended context does not save/restore during vm exity/entry, it's mainly
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* used in trusty world switch
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*/
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struct ext_context {
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uint64_t cr3;
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/* segment registers */
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struct segment_sel idtr;
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struct segment_sel ldtr;
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struct segment_sel gdtr;
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struct segment_sel tr;
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struct segment_sel cs;
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struct segment_sel ss;
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struct segment_sel ds;
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struct segment_sel es;
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struct segment_sel fs;
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struct segment_sel gs;
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uint64_t ia32_star;
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uint64_t ia32_lstar;
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uint64_t ia32_fmask;
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uint64_t ia32_kernel_gs_base;
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uint64_t ia32_pat;
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uint64_t vmx_ia32_pat;
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uint32_t ia32_sysenter_cs;
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uint64_t ia32_sysenter_esp;
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uint64_t ia32_sysenter_eip;
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uint64_t ia32_debugctl;
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uint64_t dr7;
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uint64_t tsc_offset;
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uint64_t vmx_cr0;
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uint64_t vmx_cr4;
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uint64_t vmx_cr0_read_shadow;
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uint64_t vmx_cr4_read_shadow;
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/* The 512 bytes area to save the FPU/MMX/SSE states for the guest */
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uint64_t
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fxstore_guest_area[VMX_CPU_S_FXSAVE_GUEST_AREA_SIZE / sizeof(uint64_t)]
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__aligned(16);
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};
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/* 2 worlds: 0 for Normal World, 1 for Secure World */
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#define NR_WORLD 2
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#define NORMAL_WORLD 0
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#define SECURE_WORLD 1
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struct event_injection_info {
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uint32_t intr_info;
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uint32_t error_code;
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};
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struct cpu_context {
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struct run_context run_ctx;
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struct ext_context ext_ctx;
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};
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/* Intel SDM 24.8.2, the address must be 16-byte aligned */
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struct msr_store_entry {
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uint32_t msr_num;
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uint32_t reserved;
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uint64_t value;
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} __aligned(16);
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enum {
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MSR_AREA_TSC_AUX = 0,
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MSR_AREA_COUNT,
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};
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struct msr_store_area {
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struct msr_store_entry guest[MSR_AREA_COUNT];
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struct msr_store_entry host[MSR_AREA_COUNT];
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};
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struct acrn_vcpu_arch {
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/* vmcs region for this vcpu, MUST be 4KB-aligned */
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uint8_t vmcs[CPU_PAGE_SIZE];
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/* per vcpu lapic */
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struct acrn_vlapic vlapic;
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int cur_context;
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struct cpu_context contexts[NR_WORLD];
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uint16_t vpid;
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/* Holds the information needed for IRQ/exception handling. */
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struct {
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/* The number of the exception to raise. */
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uint32_t exception;
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/* The error number for the exception. */
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uint32_t error;
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} exception_info;
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uint8_t lapic_mask;
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uint32_t irq_window_enabled;
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uint32_t nrexits;
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/* VCPU context state information */
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uint32_t exit_reason;
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uint32_t idt_vectoring_info;
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uint64_t exit_qualification;
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uint32_t inst_len;
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/* Information related to secondary / AP VCPU start-up */
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enum vm_cpu_mode cpu_mode;
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uint8_t nr_sipi;
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/* interrupt injection information */
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uint64_t pending_req;
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bool inject_event_pending;
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struct event_injection_info inject_info;
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/* List of MSRS to be stored and loaded on VM exits or VM entries */
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struct msr_store_area msr_area;
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} __aligned(CPU_PAGE_SIZE);
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struct acrn_vm;
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struct acrn_vcpu {
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/* Architecture specific definitions for this VCPU */
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struct acrn_vcpu_arch arch;
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uint16_t pcpu_id; /* Physical CPU ID of this VCPU */
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uint16_t vcpu_id; /* virtual identifier for VCPU */
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struct acrn_vm *vm; /* Reference to the VM this VCPU belongs to */
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/* State of this VCPU before suspend */
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volatile enum vcpu_state prev_state;
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volatile enum vcpu_state state; /* State of this VCPU */
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/* State of debug request for this VCPU */
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volatile enum vcpu_state dbg_req_state;
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uint64_t sync; /*hold the bit events*/
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struct list_head run_list; /* inserted to schedule runqueue */
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uint64_t pending_pre_work; /* any pre work pending? */
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bool launched; /* Whether the vcpu is launched on target pcpu */
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uint32_t paused_cnt; /* how many times vcpu is paused */
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uint32_t running; /* vcpu is picked up and run? */
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struct io_request req; /* used by io/ept emulation */
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uint64_t guest_msrs[IDX_MAX_MSR];
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#ifdef CONFIG_MTRR_ENABLED
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struct mtrr_state mtrr;
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#endif /* CONFIG_MTRR_ENABLED */
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uint64_t reg_cached;
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uint64_t reg_updated;
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} __aligned(CPU_PAGE_SIZE);
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struct vcpu_dump {
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struct acrn_vcpu *vcpu;
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char *str;
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uint32_t str_max;
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};
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static inline bool is_vcpu_bsp(const struct acrn_vcpu *vcpu)
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{
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return (vcpu->vcpu_id == BOOT_CPU_ID);
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}
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/* do not update Guest RIP for next VM Enter */
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static inline void vcpu_retain_rip(struct acrn_vcpu *vcpu)
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{
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(vcpu)->arch.inst_len = 0U;
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}
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static inline struct acrn_vlapic *
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vcpu_vlapic(struct acrn_vcpu *vcpu)
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{
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return &(vcpu->arch.vlapic);
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}
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/* External Interfaces */
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/**
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* @brief get vcpu register value
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*
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* Get target vCPU's general purpose registers value in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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* @param[in] reg register of the vcpu
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*
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* @return the value of the register.
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*/
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uint64_t vcpu_get_gpreg(const struct acrn_vcpu *vcpu, uint32_t reg);
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/**
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* @brief set vcpu register value
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*
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* Set target vCPU's general purpose registers value in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] reg register of the vcpu
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* @param[in] val the value set the register of the vcpu
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*/
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void vcpu_set_gpreg(struct acrn_vcpu *vcpu, uint32_t reg, uint64_t val);
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/**
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* @brief get vcpu RIP value
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*
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* Get & cache target vCPU's RIP in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of RIP.
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*/
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uint64_t vcpu_get_rip(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu RIP value
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*
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* Update target vCPU's RIP in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set RIP
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*/
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void vcpu_set_rip(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief get vcpu RSP value
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*
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* Get & cache target vCPU's RSP in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of RSP.
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*/
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uint64_t vcpu_get_rsp(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu RSP value
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*
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* Update target vCPU's RSP in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set RSP
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*/
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void vcpu_set_rsp(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief get vcpu EFER value
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*
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* Get & cache target vCPU's EFER in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of EFER.
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*/
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uint64_t vcpu_get_efer(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu EFER value
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*
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* Update target vCPU's EFER in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set EFER
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*/
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void vcpu_set_efer(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief get vcpu RFLAG value
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*
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* Get & cache target vCPU's RFLAGS in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of RFLAGS.
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*/
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uint64_t vcpu_get_rflags(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu RFLAGS value
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*
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* Update target vCPU's RFLAGS in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set RFLAGS
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*/
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void vcpu_set_rflags(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief get vcpu CR0 value
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*
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* Get & cache target vCPU's CR0 in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of CR0.
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*/
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uint64_t vcpu_get_cr0(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu CR0 value
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*
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* Update target vCPU's CR0 in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set CR0
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*/
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void vcpu_set_cr0(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief get vcpu CR2 value
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*
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* Get & cache target vCPU's CR2 in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of CR2.
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*/
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uint64_t vcpu_get_cr2(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu CR2 value
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*
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* Update target vCPU's CR2 in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set CR2
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*/
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void vcpu_set_cr2(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief get vcpu CR4 value
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*
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* Get & cache target vCPU's CR4 in run_context.
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*
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* @param[in] vcpu pointer to vcpu data structure
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*
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* @return the value of CR4.
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*/
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uint64_t vcpu_get_cr4(struct acrn_vcpu *vcpu);
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/**
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* @brief set vcpu CR4 value
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*
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* Update target vCPU's CR4 in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] val the value set CR4
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*/
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void vcpu_set_cr4(struct acrn_vcpu *vcpu, uint64_t val);
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uint64_t vcpu_get_pat_ext(const struct acrn_vcpu *vcpu);
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void vcpu_set_pat_ext(struct acrn_vcpu *vcpu, uint64_t val);
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/**
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* @brief set all the vcpu registers
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*
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* Update target vCPU's all registers in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] vcpu_regs all the registers' value
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*/
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void set_vcpu_regs(struct acrn_vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs);
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/**
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* @brief reset all the vcpu registers
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*
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* Reset target vCPU's all registers in run_context to initial values.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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*/
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void reset_vcpu_regs(struct acrn_vcpu *vcpu);
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/**
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* @brief set the vcpu AP entry
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*
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* Set target vCPU's AP running entry in run_context.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] entry the entry value for AP
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*/
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void set_ap_entry(struct acrn_vcpu *vcpu, uint64_t entry);
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static inline bool is_long_mode(struct acrn_vcpu *vcpu)
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{
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return (vcpu_get_efer(vcpu) & MSR_IA32_EFER_LMA_BIT) != 0UL;
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}
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static inline bool is_paging_enabled(struct acrn_vcpu *vcpu)
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{
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return (vcpu_get_cr0(vcpu) & CR0_PG) != 0UL;
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}
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static inline bool is_pae(struct acrn_vcpu *vcpu)
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{
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return (vcpu_get_cr4(vcpu) & CR4_PAE) != 0UL;
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}
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struct acrn_vcpu* get_ever_run_vcpu(uint16_t pcpu_id);
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/**
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* @brief create a vcpu for the target vm
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*
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* Creates/allocates a vCPU instance, with initialization for its vcpu_id,
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* vpid, vmcs, vlapic, etc. It sets the init vCPU state to VCPU_INIT
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*
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* @param[in] pcpu_id created vcpu will run on this pcpu
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* @param[in] vm pointer to vm data structure, this vcpu will owned by this vm.
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* @param[out] rtn_vcpu_handle pointer to the created vcpu
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*
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* @retval 0 vcpu created successfully, other values failed.
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*/
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int create_vcpu(uint16_t pcpu_id, struct acrn_vm *vm, struct acrn_vcpu **rtn_vcpu_handle);
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/**
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* @brief run into non-root mode based on vcpu setting
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*
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* An interface in vCPU thread to implement VM entry and VM exit.
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* A CPU switches between VMX root mode and non-root mode based on it.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @pre vcpu != NULL
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*
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* @retval 0 vcpu run successfully, other values failed.
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*/
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int run_vcpu(struct acrn_vcpu *vcpu);
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int shutdown_vcpu(struct acrn_vcpu *vcpu);
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/**
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* @brief unmap the vcpu with pcpu and free its vlapic
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*
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* Unmap the vcpu with pcpu and free its vlapic, and set the vcpu state to offline
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @pre vcpu != NULL
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*/
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void offline_vcpu(struct acrn_vcpu *vcpu);
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/**
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* @brief reset vcpu state and values
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*
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* Reset all fields in a vCPU instance, the vCPU state is reset to VCPU_INIT.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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*/
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void reset_vcpu(struct acrn_vcpu *vcpu);
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/**
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* @brief pause the vcpu and set new state
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*
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* Change a vCPU state to VCPU_PAUSED or VCPU_ZOMBIE, and make a reschedule request for it.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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* @param[in] new_state the state to set vcpu
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*/
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void pause_vcpu(struct acrn_vcpu *vcpu, enum vcpu_state new_state);
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/**
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* @brief resume the vcpu
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*
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* Change a vCPU state to VCPU_RUNNING, and make a reschedule request for it.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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*/
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void resume_vcpu(struct acrn_vcpu *vcpu);
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/**
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* @brief set the vcpu to running state, then it will be scheculed.
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*
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* Adds a vCPU into the run queue and make a reschedule request for it. It sets the vCPU state to VCPU_RUNNING.
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*
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* @param[inout] vcpu pointer to vcpu data structure
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*/
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void schedule_vcpu(struct acrn_vcpu *vcpu);
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/**
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* @brief create a vcpu for the vm and mapped to the pcpu.
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*
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* Create a vcpu for the vm, and mapped to the pcpu.
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*
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* @param[inout] vm pointer to vm data structure
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* @param[in] pcpu_id which the vcpu will be mapped
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*/
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int prepare_vcpu(struct acrn_vm *vm, uint16_t pcpu_id);
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void request_vcpu_pre_work(struct acrn_vcpu *vcpu, uint16_t pre_work_id);
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/**
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* @}
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*/
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/* End of acrn_vcpu */
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#endif /* ASSEMBLER */
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#endif /* VCPU_H */
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