mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-10-09 08:23:29 +00:00
3571afc683
While fixing the MISRA C violations related to integral types, we have unified
the type of the following data:
uint8_t:
phys_pin, virt_pin, vpic_pin, ioapic_pin, vioapic_pin
uint16_t:
vm_id, pcpu_id, vcpu_id, vpid
uint32_t:
vector, irq
This patch revisits the types of the fields in vhm_request as well as the
structures used as parameters in the hypercalls, and make them aligned with the
types the hypervisor uses for such data. Reserved fields are added to keep the
size and layout of the structures. Implicit paddings are also made explicit as
reserved fields.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
378 lines
8.2 KiB
C
378 lines
8.2 KiB
C
/*
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* common definition
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*
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* Copyright (C) 2017 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/**
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* @file acrn_common.h
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*
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* @brief acrn common data structure for hypercall or ioctl
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*/
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#ifndef ACRN_COMMON_H
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#define ACRN_COMMON_H
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#include <types.h>
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/*
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* Common structures for ACRN/VHM/DM
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*/
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/*
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* IO request
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*/
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#define VHM_REQUEST_MAX 16U
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#define REQ_STATE_PENDING 0
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#define REQ_STATE_SUCCESS 1
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#define REQ_STATE_PROCESSING 2
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#define REQ_STATE_FAILED -1
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#define REQ_PORTIO 0U
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#define REQ_MMIO 1U
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#define REQ_PCICFG 2U
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#define REQ_WP 3U
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#define REQUEST_READ 0U
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#define REQUEST_WRITE 1U
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/* IOAPIC device model info */
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#define VIOAPIC_RTE_NUM 48U /* vioapic pins */
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#if VIOAPIC_RTE_NUM < 24
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#error "VIOAPIC_RTE_NUM must be larger than 23"
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#endif
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/* Generic VM flags from guest OS */
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#define SECURE_WORLD_ENABLED (1UL<<0) /* Whether secure world is enabled */
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/**
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* @brief Hypercall
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*
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* @addtogroup acrn_hypercall ACRN Hypercall
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* @{
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*/
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struct mmio_request {
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uint32_t direction;
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uint32_t reserved;
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uint64_t address;
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uint64_t size;
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uint64_t value;
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} __aligned(8);
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struct pio_request {
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uint32_t direction;
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uint32_t reserved;
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uint64_t address;
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uint64_t size;
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uint32_t value;
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} __aligned(8);
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struct pci_request {
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uint32_t direction;
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uint32_t reserved[3];/* need keep same header fields with pio_request */
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int64_t size;
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int32_t value;
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int32_t bus;
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int32_t dev;
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int32_t func;
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int32_t reg;
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} __aligned(8);
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/* vhm_request are 256Bytes aligned */
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struct vhm_request {
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/* offset: 0bytes - 63bytes */
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uint32_t type;
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int32_t reserved0[15];
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/* offset: 64bytes-127bytes */
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union {
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struct pio_request pio_request;
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struct pci_request pci_request;
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struct mmio_request mmio_request;
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int64_t reserved1[8];
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} reqs;
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/* True: valid req which need VHM to process.
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* ACRN write, VHM read only
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**/
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int32_t valid;
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/* the client which is distributed to handle this request */
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int32_t client;
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/* 1: VHM had processed and success
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* 0: VHM had not yet processed
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* -1: VHM failed to process. Invalid request
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* VHM write, ACRN read only
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*/
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int32_t processed;
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} __aligned(256);
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union vhm_request_buffer {
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struct vhm_request req_queue[VHM_REQUEST_MAX];
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int8_t reserved[4096];
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} __aligned(4096);
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/**
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* @brief Info to create a VM, the parameter for HC_CREATE_VM hypercall
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*/
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struct acrn_create_vm {
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/** created vmid return to VHM. Keep it first field */
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uint16_t vmid;
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/** Reserved */
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uint16_t reserved0;
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/** VCPU numbers this VM want to create */
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uint16_t vcpu_num;
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/** Reserved */
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uint16_t reserved1;
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/** the GUID of this VM */
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uint8_t GUID[16];
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/* VM flag bits from Guest OS, now used
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* SECURE_WORLD_ENABLED (1UL<<0)
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*/
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uint64_t vm_flag;
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/** Reserved for future use*/
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uint8_t reserved2[24];
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} __aligned(8);
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/**
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* @brief Info to create a VCPU
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*
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* the parameter for HC_CREATE_VCPU hypercall
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*/
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struct acrn_create_vcpu {
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/** the virtual CPU ID for the VCPU created */
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uint16_t vcpu_id;
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/** the physical CPU ID for the VCPU created */
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uint16_t pcpu_id;
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} __aligned(8);
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/**
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* @brief Info to set ioreq buffer for a created VM
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*
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* the parameter for HC_SET_IOREQ_BUFFER hypercall
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*/
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struct acrn_set_ioreq_buffer {
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/** guest physical address of VM request_buffer */
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uint64_t req_buf;
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} __aligned(8);
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/** Interrupt type for acrn_irqline: inject interrupt to IOAPIC */
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#define ACRN_INTR_TYPE_ISA 0U
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/** Interrupt type for acrn_irqline: inject interrupt to both PIC and IOAPIC */
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#define ACRN_INTR_TYPE_IOAPIC 1U
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/**
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* @brief Info to assert/deassert/pulse a virtual IRQ line for a VM
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*
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* the parameter for HC_ASSERT_IRQLINE/HC_DEASSERT_IRQLINE/HC_PULSE_IRQLINE
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* hypercall
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*/
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struct acrn_irqline {
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/** interrupt type which could be IOAPIC or ISA */
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uint32_t intr_type;
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/** reserved for alignment padding */
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uint32_t reserved;
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/** pic IRQ for ISA type */
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uint32_t pic_irq;
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/** Reserved */
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uint32_t reserved0;
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/** ioapic IRQ for IOAPIC & ISA TYPE,
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* if ~0U then this IRQ will not be injected
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*/
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uint32_t ioapic_irq;
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/** Reserved */
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uint32_t reserved1;
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} __aligned(8);
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/**
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* @brief Info to inject a MSI interrupt to VM
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*
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* the parameter for HC_INJECT_MSI hypercall
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*/
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struct acrn_msi_entry {
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/** MSI addr[19:12] with dest VCPU ID */
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uint64_t msi_addr;
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/** MSI data[7:0] with vector */
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uint64_t msi_data;
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} __aligned(8);
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/**
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* @brief Info to inject a NMI interrupt for a VM
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*/
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struct acrn_nmi_entry {
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/** virtual CPU ID to inject */
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uint16_t vcpu_id;
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/** Reserved */
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uint16_t reserved0;
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/** Reserved */
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uint32_t reserved1;
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} __aligned(8);
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/**
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* @brief Info to remap pass-through PCI MSI for a VM
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*
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* the parameter for HC_VM_PCI_MSIX_REMAP hypercall
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*/
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struct acrn_vm_pci_msix_remap {
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/** pass-through PCI device virtual BDF# */
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uint16_t virt_bdf;
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/** pass-through PCI device physical BDF# */
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uint16_t phys_bdf;
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/** pass-through PCI device MSI/MSI-X cap control data */
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uint16_t msi_ctl;
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/** reserved for alignment padding */
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uint16_t reserved;
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/** pass-through PCI device MSI address to remap, which will
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* return the caller after remapping
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*/
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uint64_t msi_addr; /* IN/OUT: msi address to fix */
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/** pass-through PCI device MSI data to remap, which will
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* return the caller after remapping
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*/
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uint32_t msi_data;
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/** pass-through PCI device is MSI or MSI-X
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* 0 - MSI, 1 - MSI-X
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*/
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int32_t msix;
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/** if the pass-through PCI device is MSI-X, this field contains
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* the MSI-X entry table index
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*/
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int32_t msix_entry_index;
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/** if the pass-through PCI device is MSI-X, this field contains
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* Vector Control for MSI-X Entry, field defined in MSI-X spec
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*/
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uint32_t vector_ctl;
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} __aligned(8);
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/**
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* @brief The guest config pointer offset.
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*
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* It's designed to support passing DM config data pointer, based on it,
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* hypervisor would parse then pass DM defined configuration to GUEST VCPU
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* when booting guest VM.
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* the address 0xef000 here is designed by DM, as it arranged all memory
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* layout below 1M, DM add this address to E280 reserved range to make sure
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* there is no overlap for the address 0xef000 usage.
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*/
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#define GUEST_CFG_OFFSET 0xef000UL
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/**
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* @brief Info The power state data of a VCPU.
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*
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*/
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#define SPACE_SYSTEM_MEMORY 0U
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#define SPACE_SYSTEM_IO 1U
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#define SPACE_PCI_CONFIG 2U
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#define SPACE_Embedded_Control 3U
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#define SPACE_SMBUS 4U
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#define SPACE_PLATFORM_COMM 10U
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#define SPACE_FFixedHW 0x7FU
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struct acpi_generic_address {
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uint8_t space_id;
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uint8_t bit_width;
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uint8_t bit_offset;
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uint8_t access_size;
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uint64_t address;
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} __attribute__((aligned(8)));
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struct cpu_cx_data {
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struct acpi_generic_address cx_reg;
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uint8_t type;
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uint32_t latency;
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uint64_t power;
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} __attribute__((aligned(8)));
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struct cpu_px_data {
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uint64_t core_frequency; /* megahertz */
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uint64_t power; /* milliWatts */
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uint64_t transition_latency; /* microseconds */
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uint64_t bus_master_latency; /* microseconds */
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uint64_t control; /* control value */
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uint64_t status; /* success indicator */
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} __attribute__((aligned(8)));
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struct acpi_sx_pkg {
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uint8_t val_pm1a;
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uint8_t val_pm1b;
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uint16_t reserved;
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} __attribute__((aligned(8)));
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struct pm_s_state_data {
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struct acpi_generic_address pm1a_evt;
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struct acpi_generic_address pm1b_evt;
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struct acpi_generic_address pm1a_cnt;
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struct acpi_generic_address pm1b_cnt;
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struct acpi_sx_pkg s3_pkg;
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struct acpi_sx_pkg s5_pkg;
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uint32_t *wake_vector_32;
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uint64_t *wake_vector_64;
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}__attribute__((aligned(8)));
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struct acpi_info {
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int16_t x86_family;
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int16_t x86_model;
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struct pm_s_state_data pm_s_state;
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/* TODO: we can add more acpi info field here if needed. */
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};
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/**
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* @brief Info PM command from DM/VHM.
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*
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* The command would specify request type(e.g. get px count or data) for
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* specific VM and specific VCPU with specific state number.
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* For Px, PMCMD_STATE_NUM means Px number from 0 to (MAX_PSTATE - 1),
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* For Cx, PMCMD_STATE_NUM means Cx entry index from 1 to MAX_CX_ENTRY.
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*/
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#define PMCMD_VMID_MASK 0xff000000U
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#define PMCMD_VCPUID_MASK 0x00ff0000U
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#define PMCMD_STATE_NUM_MASK 0x0000ff00U
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#define PMCMD_TYPE_MASK 0x000000ffU
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#define PMCMD_VMID_SHIFT 24
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#define PMCMD_VCPUID_SHIFT 16
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#define PMCMD_STATE_NUM_SHIFT 8
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enum pm_cmd_type {
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PMCMD_GET_PX_CNT,
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PMCMD_GET_PX_DATA,
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PMCMD_GET_CX_CNT,
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PMCMD_GET_CX_DATA,
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};
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/**
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* @}
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*/
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#endif /* ACRN_COMMON_H */
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