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296b649ae9
When the SOS kernel/pre-launched OS access the 0xCF8/0xCFC, it will cause the vm-exit and then the hypervisor tries to emulate the PCI_cfg access. 0xCF8 write: The bdf/reg is captured. cache_reg = value & (0xFF); 0xCFC-0xCFF read/write: offset = address - 0xCFC. Then cached_reg + offset is used as the offset to access the pci_cfg. If the aligned reg is passed in 0xCF8 register, it can work well. But when the unaligned reg is passed in 0xCF8 register, the cached_reg + offset will cause that the incorrect pci_cfg offset is accessed. For example: The cached_reg = 0x02(Device_ID offset) based on the value passed from 0xCF8 offset = 2 based on 0xCFC-0xCFF address. Then cached_reg + offset is used as the offset(PCI_CMD_REG) In fact the unaligned reg can work well on the real HW. So the cached_reg should be aligned to handle the unaligned reg passed in 0xCF8 reg. Tracked-On: #3249 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Yin Fengwei <fengwei.yin@intel.com> |
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