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Per PCI Firmware Specification Revision 3.0, 4.1.2. MCFG Table Description: Memory Mapped Enhanced Configuration Space Base Address Allocation Structure assign the Start Bus Number and the End Bus Number which could decoded by the Host Bridge. We should not access the PCI device which bus number outside of the range of [Start Bus Number, End Bus Number). For ACRN, we should: 1. Don't detect PCI device which bus number outside the range of [Start Bus Number, End Bus Number) of MCFG ACPI Table. 2. Only trap the ECAM MMIO size: [MMCFG_BASE_ADDRESS, MMCFG_BASE_ADDRESS + (End Bus Number - Start Bus Number + 1) * 0x100000) for SOS. Tracked-On: #5233 Signed-off-by: Li Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
33 lines
918 B
C
33 lines
918 B
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VACPI_H
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#define VACPI_H
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#include <acpi.h>
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#define ACPI_OEM_ID "ACRN "
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/* Use a pre-loaded multiboot module as pre-launched VM ACPI table.
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* The module file size is fixed to 1MB and loaded to GPA 0x7ff00000.
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* A hardcoded RSDP table at GPA 0x000f2400 will point to the XSDT
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* table which at GPA 0x7ff00080;
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* The module file should be generated by acrn-config tool;
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*/
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#define VIRT_ACPI_DATA_ADDR 0x7ff00000UL
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#define VIRT_ACPI_NVS_ADDR 0x7fff0000UL
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#define VIRT_RSDP_ADDR 0x000f2400UL
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#define VIRT_XSDT_ADDR 0x7ff00080UL
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/* virtual PCI MMCFG address base for pre/post-launched VM. */
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#define UOS_VIRT_PCI_MMCFG_BASE 0xE0000000UL
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#define UOS_VIRT_PCI_MMCFG_START_BUS 0x0U
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#define UOS_VIRT_PCI_MMCFG_END_BUS 0xFFU
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void build_vrsdp(struct acrn_vm *vm);
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#endif /* VACPI_H */
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