mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-07 16:07:03 +00:00
a073ebeeca
This commit extend lapic pass-through for DM launched VM, generally for hard RT scenarios. Similar to the partition mode, the vlapic is working under the xapic mode at first, only when x2apic mode is enabled, lapic is passed through, because the physical LAPICs are under x2apic mode. Main changes includes: - add is_lapic_pt() to check if a vm is created with lapic pt or not, to combine codes of partition mode and DM launched vm with lapic passthrough, including: - reuse the irq delievery function and rename it to dispatch_interrupt_lapic_pt(); - reuse switch_apicv_mode_x2apic(); - reuse ICR handling codes to avoid malicious IPI; - intercept ICR/APICID/LDR msr access when lapic_pt; - for vm with lapic passthrough, irq is always disabled under root mode. Tracked-On: #2351 Signed-off-by: Yan, Like <like.yan@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
92 lines
1.9 KiB
C
92 lines
1.9 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <hypervisor.h>
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#include <schedule.h>
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#include <softirq.h>
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void vcpu_thread(struct sched_object *obj)
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{
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struct acrn_vcpu *vcpu = list_entry(obj, struct acrn_vcpu, sched_obj);
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uint32_t basic_exit_reason = 0U;
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int32_t ret = 0;
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do {
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/* If vcpu is not launched, we need to do init_vmcs first */
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if (!vcpu->launched) {
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init_vmcs(vcpu);
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}
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if (!is_lapic_pt(vcpu->vm)) {
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/* handle pending softirq when irq enable*/
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do_softirq();
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CPU_IRQ_DISABLE();
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/* handle risk softirq when disabling irq*/
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do_softirq();
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}
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/* Check and process pending requests(including interrupt) */
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ret = acrn_handle_pending_request(vcpu);
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if (ret < 0) {
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pr_fatal("vcpu handling pending request fail");
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pause_vcpu(vcpu, VCPU_ZOMBIE);
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continue;
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}
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if (need_reschedule(vcpu->pcpu_id)) {
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schedule();
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continue;
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}
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profiling_vmenter_handler(vcpu);
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TRACE_2L(TRACE_VM_ENTER, 0UL, 0UL);
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ret = run_vcpu(vcpu);
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if (ret != 0) {
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pr_fatal("vcpu resume failed");
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pause_vcpu(vcpu, VCPU_ZOMBIE);
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continue;
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}
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basic_exit_reason = vcpu->arch.exit_reason & 0xFFFFU;
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TRACE_2L(TRACE_VM_EXIT, basic_exit_reason, vcpu_get_rip(vcpu));
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vcpu->arch.nrexits++;
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profiling_pre_vmexit_handler(vcpu);
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if (!is_lapic_pt(vcpu->vm)) {
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CPU_IRQ_ENABLE();
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}
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/* Dispatch handler */
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ret = vmexit_handler(vcpu);
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if (ret < 0) {
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pr_fatal("dispatch VM exit handler failed for reason"
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" %d, ret = %d!", basic_exit_reason, ret);
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vcpu_inject_gp(vcpu, 0U);
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continue;
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}
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profiling_post_vmexit_handler(vcpu);
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} while (1);
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}
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void default_idle(__unused struct sched_object *obj)
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{
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uint16_t pcpu_id = get_cpu_id();
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while (1) {
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if (need_reschedule(pcpu_id)) {
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schedule();
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} else if (need_offline(pcpu_id) != 0) {
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cpu_dead();
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} else {
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CPU_IRQ_ENABLE();
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cpu_do_idle();
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CPU_IRQ_DISABLE();
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}
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}
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}
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