acrn-hypervisor/hypervisor/include/arch/x86/asm/tsc.h
Liang Yi 5a2b89b0a4 hv/mod_timer: split tsc handling code from timer.
Generalize and split basic cpu cycle/tick routines from x86/timer:
- Instead of rdstc(), use cpu_ticks() in generic code.
- Instead of get_tsc_khz(), use cpu_tickrate() in generic code.
- Include "common/ticks.h" instead of "x86/timer.h" in generic code.
- CYCLES_PER_MS is renamed to TICKS_PER_MS.

The x86 specific API rdstc() and get_tsc_khz(), as well as TSC_PER_MS
are still available in arch/x86/tsc.h but only for x86 specific usage.

Tracked-On: #5920
Signed-off-by: Rong Liu <rong2.liu@intel.com>
Signed-off-by: Yi Liang <yi.liang@intel.com>
2021-05-18 16:43:28 +08:00

42 lines
688 B
C

/*
* Copyright (C) 2021 Intel Corporation.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARCH_X86_TSC_H
#define ARCH_X86_TSC_H
#include <types.h>
#define TSC_PER_MS ((uint64_t)get_tsc_khz())
/**
* @brief Read Time Stamp Counter (TSC).
*
* @return TSC value
*/
static inline uint64_t rdtsc(void)
{
uint32_t lo, hi;
asm volatile("rdtsc" : "=a" (lo), "=d" (hi));
return ((uint64_t)hi << 32U) | lo;
}
/**
* @brief Get Time Stamp Counter (TSC) frequency in KHz.
*
* @return TSC frequency in KHz
*/
uint32_t get_tsc_khz(void);
/**
* @brief Calibrate Time Stamp Counter (TSC) frequency.
*
* @return None
*/
void calibrate_tsc(void);
#endif /* ARCH_X86_TSC_H */