mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2026-05-04 01:49:28 +00:00
b8db76fe55
Implement the SBI IPI (Inter-Processor Interrupt) extension to enable guest VMs to send software interrupts between virtual CPUs. The implementation handles the SBI_IPI_SEND_IPI function call, which allows a guest to target one or more vCPUs using either: - A mask (bitmap of target harts relative to a base hart ID) - Broadcast mode (when mask_base is UINT64_MAX) The IPI is delivered by asserting the VS-level software interrupt (VSSIP, bit 2) on each target vCPU. Proper validation is performed to ensure hart IDs are within valid range and all masked harts exist. Tracked-On: #8851 Signed-off-by: Haoyu Tang <haoyu.tang@intel.com> Acked-by: Wang Yu1 <yu1.wang@intel.com>
106 lines
3.0 KiB
Makefile
106 lines
3.0 KiB
Makefile
CROSS_COMPILE ?= riscv64-linux-gnu-
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CC = $(CROSS_COMPILE)gcc
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AS = $(CROSS_COMPILE)as
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AR = $(CROSS_COMPILE)ar
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LD = $(CROSS_COMPILE)ld
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OBJCOPY = $(CROSS_COMPILE)objcopy
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ARCH_LDSCRIPT_IN = arch/riscv/link_ram.ld.in
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CFLAGS += -std=gnu99
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ASFLAGS +=
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LDFLAGS += -Wl,--no-warn-rwx-segments
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LDFLAGS += -Wl,-z,norelro
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LDFLAGS += -Wl,-z,noexecstack
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ifeq (y, $(CONFIG_RELOC))
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CFLAGS += -fpie
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ASFLAGS += -fpie
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CFLAGS += -fvisibility=hidden
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LDFLAGS += -shared
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LDFLAGS += -Wl,-z,notext
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LDFLAGS += -Wl,-Bsymbolic
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LDFLAGS += -Wl,-z,defs
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else
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CFLAGS += -fno-pie -static
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ASFLAGS += -fno-pie -static
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LDFLAGS += -static
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endif
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# g expands to i, m, a, f, d, zicsr and zifencei.
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# h for hypervisor extension
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RV_ISA += gh
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RV_ISA += zbb
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RV_ISA += zicbom
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RV_ISA += zihintpause
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ARCH_CFLAGS += -march=rv64$(subst $() $(),_,$(RV_ISA))
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ARCH_CFLAGS += -mabi=lp64d
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ARCH_CFLAGS += -mcmodel=medany
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ARCH_ASFLAGS += -march=rv64$(subst $() $(),_,$(RV_ISA))
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# HV host assembly sources
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HOST_S_SRCS += arch/riscv/boot/cpu_entry.S
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HOST_S_SRCS += arch/riscv/intr.S
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HOST_S_SRCS += arch/riscv/sched.S
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# HV host C sources
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HOST_C_SRCS += arch/riscv/boot/reloc.c
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HOST_C_SRCS += arch/riscv/lib/random.c
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HOST_C_SRCS += arch/riscv/init.c
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HOST_C_SRCS += arch/riscv/sbi.c
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HOST_C_SRCS += arch/riscv/notify.c
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HOST_C_SRCS += arch/riscv/timer.c
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HOST_C_SRCS += arch/riscv/trap.c
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HOST_C_SRCS += arch/riscv/cpu.c
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HOST_C_SRCS += arch/riscv/mmu.c
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HOST_C_SRCS += arch/riscv/irq.c
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HOST_C_SRCS += arch/riscv/pgtable.c
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HOST_C_SRCS += arch/riscv/security.c
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HOST_C_SRCS += arch/riscv/pm.c
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# Virtual platform assembly sources
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VP_S_SRCS +=
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# Virtual platform C sources
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VP_C_SRCS += arch/riscv/guest/guest_memory.c
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VP_C_SRCS += arch/riscv/guest/vcpu.c
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VP_C_SRCS += arch/riscv/guest/vm.c
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VP_C_SRCS += arch/riscv/guest/vcpu_exit.c
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VP_C_SRCS += arch/riscv/guest/virq.c
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VP_C_SRCS += arch/riscv/guest/vsbi.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_base.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_hsm.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_srst.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_acrn.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_dbcn.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_timer.c
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VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_ipi.c
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VM_CFG_C_SRCS += $(SCENARIO_CFG_DIR)/vm_configurations.c
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VM_CFG_C_SRCS += $(BOARD_CFG_DIR)/pci_dev.c
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VM_CFG_C_SRCS += $(BOARD_CFG_DIR)/pt_intx.c
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VM_CFG_C_SRCS += $(BOARD_INFO_DIR)/board.c
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HOST_C_OBJS := $(patsubst %.c,$(HV_OBJDIR)/%.o,$(HOST_C_SRCS))
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HOST_S_OBJS := $(patsubst %.S,$(HV_OBJDIR)/%.o,$(HOST_S_SRCS))
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VP_C_OBJS := $(patsubst %.c,$(HV_OBJDIR)/%.o,$(VP_C_SRCS))
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VP_S_OBJS := $(patsubst %.S,$(HV_OBJDIR)/%.o,$(VP_S_SRCS))
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VM_CFG_C_OBJS := $(patsubst %.c,%.o,$(VM_CFG_C_SRCS))
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HOST_MOD := $(HV_MODDIR)/host_mod.a
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VP_MOD := $(HV_MODDIR)/vp_mod.a
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MODULES += $(HOST_MOD)
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MODULES += $(VP_MOD)
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$(HOST_MOD): $(HOST_C_OBJS) $(HOST_S_OBJS)
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$(AR) $(ARFLAGS) $(HOST_MOD) $(HOST_C_OBJS) $(HOST_S_OBJS)
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$(VP_MOD): $(VP_C_OBJS) $(VP_S_OBJS) $(VM_CFG_C_OBJS)
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$(AR) $(ARFLAGS) $(VP_MOD) $(VP_C_OBJS) $(VP_S_OBJS) $(VM_CFG_C_OBJS)
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