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bab6e4010c
move the two function to common Tracked-On: #8831 Signed-off-by: hangliu1 <hang1.liu@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
430 lines
12 KiB
C
430 lines
12 KiB
C
/*
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* Copyright (C) 2018-2024 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PGTABLE_H
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#define PGTABLE_H
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#include <asm/page.h>
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#include <pgtable.h>
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/**
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* @addtogroup hwmgmt_page
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*
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* @{
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*/
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/**
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* @file
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* @brief All APIs to support page table management
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*
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* This file defines macros, structures, declarations and functions related for managing page tables.
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*
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*/
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#define PAGE_PRESENT (1UL << 0U)
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#define PAGE_RW (1UL << 1U)
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#define PAGE_USER (1UL << 2U)
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#define PAGE_PWT (1UL << 3U)
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#define PAGE_PCD (1UL << 4U)
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#define PAGE_ACCESSED (1UL << 5U)
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#define PAGE_DIRTY (1UL << 6U)
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#define PAGE_PSE (1UL << 7U)
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#define PAGE_GLOBAL (1UL << 8U)
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#define PAGE_PAT_LARGE (1UL << 12U)
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#define PAGE_NX (1UL << 63U)
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#define PAGE_CACHE_MASK (PAGE_PCD | PAGE_PWT)
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#define PAGE_CACHE_WB 0UL
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#define PAGE_CACHE_WT PAGE_PWT
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#define PAGE_CACHE_UC_MINUS PAGE_PCD
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#define PAGE_CACHE_UC (PAGE_PCD | PAGE_PWT)
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#define PAGE_ATTR_USER (PAGE_PRESENT | PAGE_RW | PAGE_USER | PAGE_NX)
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/**
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* @defgroup ept_mem_access_right EPT Memory Access Right
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*
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* This is a group that includes EPT Memory Access Right Definitions.
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*
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* @{
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*/
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/**
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* @brief EPT memory access right is read-only.
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*/
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#define EPT_RD (1UL << 0U)
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/**
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* @brief EPT memory access right is read/write.
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*/
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#define EPT_WR (1UL << 1U)
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/**
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* @brief EPT memory access right is executable.
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*/
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#define EPT_EXE (1UL << 2U)
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/**
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* @brief EPT memory access right is read/write and executable.
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*/
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#define EPT_RWX (EPT_RD | EPT_WR | EPT_EXE)
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/**
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* @}
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*/
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/* End of ept_mem_access_right */
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/**
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* @defgroup ept_mem_type EPT Memory Type
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*
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* This is a group that includes EPT Memory Type Definitions.
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*
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* @{
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*/
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/**
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* @brief EPT memory type is specified in bits 5:3 of the EPT paging-structure entry.
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*/
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#define EPT_MT_SHIFT 3U
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/**
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* @brief EPT memory type is uncacheable.
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*/
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#define EPT_UNCACHED (0UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write combining.
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*/
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#define EPT_WC (1UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write through.
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*/
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#define EPT_WT (4UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write protected.
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*/
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#define EPT_WP (5UL << EPT_MT_SHIFT)
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/**
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* @brief EPT memory type is write back.
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*/
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#define EPT_WB (6UL << EPT_MT_SHIFT)
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/**
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* @brief Ignore PAT memory type.
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*/
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#define EPT_IGNORE_PAT (1UL << 6U)
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/**
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* @}
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*/
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/* End of ept_mem_type */
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#define EPT_MT_MASK (7UL << EPT_MT_SHIFT)
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#define EPT_VE (1UL << 63U)
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/* EPT leaf entry bits (bit 52 - bit 63) should be maksed when calculate PFN */
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#define EPT_PFN_HIGH_MASK 0xFFF0000000000000UL
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#define PML4E_SHIFT 39U
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#define PTRS_PER_PML4E 512UL
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#define PML4E_SIZE (1UL << PML4E_SHIFT)
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#define PML4E_MASK (~(PML4E_SIZE - 1UL))
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#define PDPTE_SHIFT 30U
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#define PTRS_PER_PDPTE 512UL
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#define PDPTE_SIZE (1UL << PDPTE_SHIFT)
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#define PDPTE_MASK (~(PDPTE_SIZE - 1UL))
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#define PDE_SHIFT 21U
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#define PTRS_PER_PDE 512UL
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#define PDE_SIZE (1UL << PDE_SHIFT)
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#define PDE_MASK (~(PDE_SIZE - 1UL))
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#define PTE_SHIFT 12U
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#define PTRS_PER_PTE 512UL
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#define PTE_SIZE (1UL << PTE_SHIFT)
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#define PTE_MASK (~(PTE_SIZE - 1UL))
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/* TODO: PAGE_MASK & PHYSICAL_MASK */
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#define PML4E_PFN_MASK 0x0000FFFFFFFFF000UL
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#define PDPTE_PFN_MASK 0x0000FFFFFFFFF000UL
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#define PDE_PFN_MASK 0x0000FFFFFFFFF000UL
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#define EPT_ENTRY_PFN_MASK ((~EPT_PFN_HIGH_MASK) & PAGE_MASK)
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/**
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* @brief Page tables level in IA32 paging mode
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*
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* 4-level paging in IA32 mode may map linear addresses to 4-KByte pages, 2-MByte pages, or 1-GByte pages. The 4 levels
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* are PML4, PDPT, PD, and PT. The value to present each level is fixed.
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*/
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enum _page_table_level {
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IA32E_PML4 = 0, /**< The Page-Map-Level-4(PML4) level in the page tables.
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* The value is fixed to 0. */
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IA32E_PDPT = 1, /**< The Page-Directory-Pointer-Table(PDPT) level in the page tables. */
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IA32E_PD = 2, /**< The Page-Directory(PD) level in the page tables. */
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IA32E_PT = 3, /**< The Page-Table(PT) level in the page tables. */
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};
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/**
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* @brief Translate a host physical address to a host virtual address before paging mode enabled.
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*
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* This function is used to translate a host physical address to a host virtual address before paging mode enabled. HPA
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* is 1:1 mapping to HVA.
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*
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* It returns the host virtual address that corresponds to the given host physical address.
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*
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* @param[in] x The host physical address
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*
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* @return The translated host virtual address
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*
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* @retval NULL if x == 0
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*
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* @pre N/A
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*
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* @post N/A
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*
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* @remark This function is used before paging mode enabled.
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*/
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static inline void *hpa2hva_early(uint64_t x)
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{
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return (void *)x;
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}
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/**
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* @brief Translate a host virtual address to a host physical address before paging mode enabled.
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*
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* This function is used to translate a host virtual address to a host physical address before paging mode enabled. HVA
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* is 1:1 mapping to HPA.
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*
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* It returns the host physical address that corresponds to the given host virtual address.
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*
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* @param[in] x The host virtual address to be translated
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*
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* @return The translated host physical address
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*
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* @retval 0 if x == NULL
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*
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* @pre N/A
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*
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* @post N/A
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*
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* @remark This function is used before paging mode enabled.
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*/
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static inline uint64_t hva2hpa_early(void *x)
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{
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return (uint64_t)x;
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}
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static inline uint64_t pml4e_index(uint64_t address)
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{
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return (address >> PML4E_SHIFT) & (PTRS_PER_PML4E - 1UL);
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}
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static inline uint64_t pdpte_index(uint64_t address)
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{
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return (address >> PDPTE_SHIFT) & (PTRS_PER_PDPTE - 1UL);
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}
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static inline uint64_t pde_index(uint64_t address)
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{
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return (address >> PDE_SHIFT) & (PTRS_PER_PDE - 1UL);
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}
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static inline uint64_t pte_index(uint64_t address)
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{
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return (address >> PTE_SHIFT) & (PTRS_PER_PTE - 1UL);
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}
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static inline uint64_t *pml4e_page_vaddr(uint64_t pml4e)
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{
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return hpa2hva(pml4e & PML4E_PFN_MASK);
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}
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static inline uint64_t *pdpte_page_vaddr(uint64_t pdpte)
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{
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return hpa2hva(pdpte & PDPTE_PFN_MASK);
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}
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static inline uint64_t *pde_page_vaddr(uint64_t pde)
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{
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return hpa2hva(pde & PDE_PFN_MASK);
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}
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/**
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* @brief Calculate the page map level-4 table entry(PML4E) for a specified input address.
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*
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* The page map level-4 table(PML4T) contains 512 entries, each of which points to a page directory pointer table(PDPT).
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* Address has the index to the PML4E in PML4T. This function is used to calculate the address of PML4E. It is typically
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* used during the page translation process.
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*
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* It will return a pointer to the page map level-4 table entry(PML4E).
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*
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* @param[in] pml4_page A pointer to a page map level-4 table(PML4T) page.
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* @param[in] addr The address value for which the page map level-4 table entry(PML4E) address is to be calculated.
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* For hypervisor's MMU, it is the host virtual address.
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* For each VM's EPT, it is the guest physical address.
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*
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* @return A pointer to the PML4E.
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*
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* @pre pml4_page != NULL
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*
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* @post N/A
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*/
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static inline uint64_t *pml4e_offset(uint64_t *pml4_page, uint64_t addr)
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{
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return pml4_page + pml4e_index(addr);
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}
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/**
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* @brief Calculate the page directory pointer table entry(PDPTE) for a specified input address.
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*
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* The page directory pointer table(PDPT) is referenced by a page map level-4 table entry(PML4E) and echo entry(PDPTE)
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* in PDPT points to a page directory table(PDT). Address has the index to the PDPTE in PDPT. This function is used to
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* calculate the address of PDPTE. It is typically used during the page translation process.
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*
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* It will return a pointer to the page directory pointer table entry(PDPTE).
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*
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* @param[in] pml4e A pointer to a page map level-4 table entry(PML4E).
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* @param[in] addr The address for which the page directory pointer table entry(PDPTE) address is to be calculated.
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* For hypervisor's MMU, it is the host virtual address.
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* For each VM's EPT, it is the guest physical address.
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*
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* @return A pointer to the PDPTE.
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*
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* @pre pml4e != NULL
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*
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* @post N/A
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*/
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static inline uint64_t *pdpte_offset(const uint64_t *pml4e, uint64_t addr)
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{
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return pml4e_page_vaddr(*pml4e) + pdpte_index(addr);
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}
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/**
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* @brief Calculate the page directory table entry(PDE) for a specified input address.
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*
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* The page directory table(PDT) is referenced by a page directory pointer table entry(PDPTE) and echo entry(PDE) in PDT
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* points to a page table(PT). Address has the index to the PDE in PDT. This function is used to calculate the address
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* of PDE. It is typically used during the page translation process.
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*
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* It will return a pointer to the page directory table entry(PDE).
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*
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* @param[in] pdpte A pointer to a page directory pointer table entry(PDPTE).
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* @param[in] addr The address for which the page directory table entry(PDE) address is to be calculated.
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* For hypervisor's MMU, it is the host virtual address.
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* For each VM's EPT, it is the guest physical address.
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*
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* @return A pointer to the PDE.
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*
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* @pre pdpte != NULL
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*
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* @post N/A
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*/
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static inline uint64_t *pde_offset(const uint64_t *pdpte, uint64_t addr)
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{
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return pdpte_page_vaddr(*pdpte) + pde_index(addr);
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}
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/**
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* @brief Calculate the page table entry(PTE) for a specified input address.
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*
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* The page table entry(PTE) is the entry that maps a page. This function is used to calculate the address of the PTE.
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* It is typically used during the page translation process. The function is essential for managing memory access
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* permissions and for implementing memory systems.
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*
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* It will return the address of a page table entry(PTE).
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*
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* @param[in] pde A pointer to a page directory entry(PDE).
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* @param[in] addr The address for which the page table entry(PTE) address is to be calculated.
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* For hypervisor's MMU, it is the host virtual address.
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* For each VM's EPT, it is the guest physical address.
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*
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* @return A pointer to the page table entry(PTE).
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*
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* @pre pde != NULL
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*
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* @post N/A
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*/
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static inline uint64_t *pte_offset(const uint64_t *pde, uint64_t addr)
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{
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return pde_page_vaddr(*pde) + pte_index(addr);
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}
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/**
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* @brief Check whether the PS flag of the specified page directory table entry(PDE) is 1 or not.
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*
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* PS(Page Size) flag in PDE indicates whether maps a 2-MByte page or references a page table. This function checks this
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* flag. This function is typically used in the context of setting up or modifying page tables where it's necessary to
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* distinguish between large and regular page mappings.
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*
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* It returns the value that bit 7 is 1 if the specified PDE maps a 2-MByte page, or 0 if references a page table.
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*
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* @param[in] pde The page directory table entry(PDE) to check.
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*
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* @return The value of PS flag in the PDE.
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*
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* @retval PAGE_PSE indicating mapping to a 2-MByte page.
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* @retval 0 indicating reference to a page table.
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*
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* @pre N/A
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*
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* @post N/A
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*/
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static inline uint64_t pde_large(uint64_t pde)
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{
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return pde & PAGE_PSE;
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}
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/**
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* @brief Check whether the PS flag of the specified page directory pointer table entry(PDPTE) is 1 or not.
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*
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* PS(Page Size) flag in PDPTE indicates whether maps a 1-GByte page or references a page directory table. This function
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* checks this flag. This function is typically used in the context of setting up or modifying page tables where it's
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* necessary to distinguish between large and regular page mappings.
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*
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* It returns the value that bit 7 is 1 if the specified PDPTE maps a 1-GByte page, and 0 if references a page table.
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*
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* @param[in] pdpte The page directory pointer table entry(PDPTE) to check.
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*
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* @return The value of PS flag in the PDPTE.
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*
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* @retval PAGE_PSE indicating mapping to a 1-GByte page.
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* @retval 0 indicating reference to a page directory table.
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*
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* @pre N/A
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*
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* @post N/A
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*/
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static inline uint64_t pdpte_large(uint64_t pdpte)
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{
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return pdpte & PAGE_PSE;
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}
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void init_sanitized_page(uint64_t *sanitized_page, uint64_t hpa);
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void *pgtable_create_root(const struct pgtable *table);
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void *pgtable_create_trusty_root(const struct pgtable *table,
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void *nworld_pml4_page, uint64_t prot_table_present, uint64_t prot_clr);
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/**
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*@pre (pml4_page != NULL) && (pg_size != NULL)
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*/
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const uint64_t *pgtable_lookup_entry(uint64_t *pml4_page, uint64_t addr,
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uint64_t *pg_size, const struct pgtable *table);
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void pgtable_add_map(uint64_t *pml4_page, uint64_t paddr_base,
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uint64_t vaddr_base, uint64_t size,
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uint64_t prot, const struct pgtable *table);
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void pgtable_modify_or_del_map(uint64_t *pml4_page, uint64_t vaddr_base,
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uint64_t size, uint64_t prot_set, uint64_t prot_clr,
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const struct pgtable *table, uint32_t type);
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#endif /* PGTABLE_H */
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/**
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* @}
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*/
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