mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-23 23:54:55 +00:00
e0973e4883
Convert GSI_MASK_IRQ and GSI_UNMASK_IRQ to inline functions. v1 -> v2: After changing GSI_MASK_IRQ and GSI_UNMASK_IRQ from MACROs to functions, 'gsi_(mask|unmask)_irq' are the exposed APIs and 'irq_gsi_mask_unmask' becomes internal. In order to reflect this change, - change 'irq_gsi_mask_unmask' as internal function in ioapic.c - declare 'gsi_(mask|unmask)_irq' in ioapic.h - define 'gsi_(mask|unmask)_irq' in ioapic.c Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
40 lines
964 B
C
40 lines
964 B
C
/*
|
|
* Copyright (C) 2018 Intel Corporation. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef IOAPIC_H
|
|
#define IOAPIC_H
|
|
|
|
/*
|
|
* IOAPIC_MAX_LINES is architecturally defined.
|
|
* The usable RTEs may be a subset of the total on a per IO APIC basis.
|
|
*/
|
|
#define IOAPIC_MAX_LINES 120U
|
|
#define NR_LEGACY_IRQ 16U
|
|
#define NR_LEGACY_PIN NR_LEGACY_IRQ
|
|
#define NR_MAX_GSI (CONFIG_NR_IOAPICS * IOAPIC_MAX_LINES)
|
|
|
|
void setup_ioapic_irqs(void);
|
|
|
|
bool irq_is_gsi(uint32_t irq);
|
|
uint8_t irq_to_pin(uint32_t irq);
|
|
uint32_t pin_to_irq(uint8_t pin);
|
|
void ioapic_set_rte(uint32_t irq, union ioapic_rte rte);
|
|
void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte);
|
|
|
|
void suspend_ioapic(void);
|
|
void resume_ioapic(void);
|
|
|
|
void gsi_mask_irq(uint32_t irq);
|
|
void gsi_unmask_irq(uint32_t irq);
|
|
|
|
extern uint8_t pic_ioapic_pin_map[NR_LEGACY_PIN];
|
|
|
|
#ifdef HV_DEBUG
|
|
int get_ioapic_info(char *str_arg, int str_max_len);
|
|
#endif /* HV_DEBUG */
|
|
|
|
#endif /* IOAPIC_H */
|