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https://github.com/projectacrn/acrn-hypervisor.git
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8b16be9185
Many of the license and Intel copyright headers include the "All rights reserved" string. It is not relevant in the context of the BSD-3-Clause license that the code is released under. This patch removes those strings throughout the code (hypervisor, devicemodel and misc). Tracked-On: #7254 Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
125 lines
2.9 KiB
C
125 lines
2.9 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <reloc.h>
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#include <asm/boot/ld_sym.h>
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#ifdef CONFIG_RELOC
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#define DT_NULL 0U /* end of .dynamic section */
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#define DT_RELA 7U /* relocation table */
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#define DT_RELASZ 8U /* size of reloc table */
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#define DT_RELAENT 9U /* size of one entry */
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#define R_X86_64_RELATIVE 8UL
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struct Elf64_Dyn {
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uint64_t d_tag;
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uint64_t d_ptr;
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};
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struct Elf64_Rel {
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uint64_t r_offset;
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uint64_t r_info;
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uint64_t reserved;
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};
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#endif
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static inline uint64_t elf64_r_type(uint64_t i)
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{
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return (i & 0xffffffffUL);
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}
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/* get the delta between CONFIG_HV_RAM_START and the actual load address */
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uint64_t get_hv_image_delta(void)
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{
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uint64_t addr;
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asm volatile (" call 0f\n"
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"0: pop %%rax\n"
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" sub $0b, %%rax\n"
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" mov %%rax, %0\n"
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: "=m" (addr)
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:
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: "%rax");
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return addr;
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}
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/* get the actual Hypervisor load address (HVA) */
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uint64_t get_hv_image_base(void)
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{
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return (get_hv_image_delta() + CONFIG_HV_RAM_START);
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}
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void relocate(void)
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{
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#ifdef CONFIG_RELOC
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struct Elf64_Dyn *dyn;
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struct Elf64_Rel *entry = NULL;
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uint8_t *rela_start = NULL, *rela_end = NULL;
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uint64_t rela_size = 0;
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uint64_t delta, entry_size = 0;
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uint64_t trampoline_end;
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uint64_t primary_entry_end;
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uint64_t *addr;
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/* get the delta that needs to be patched */
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delta = get_hv_image_delta();
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if (delta != 0U) {
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/* Look for the descriptoin of relocation sections */
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for (dyn = (struct Elf64_Dyn *)_DYNAMIC; dyn->d_tag != DT_NULL; dyn++) {
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switch (dyn->d_tag) {
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case DT_RELA:
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rela_start = (uint8_t *)(dyn->d_ptr + delta);
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break;
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case DT_RELASZ:
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rela_size = dyn->d_ptr;
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break;
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case DT_RELAENT:
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entry_size = dyn->d_ptr;
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break;
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default:
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/* if no RELA/RELASZ found, both start and end will be initialized to NULL, and later while loop won't be executed */
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break;
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}
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}
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/*
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* Need to subtract the relocation delta to get the correct
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* absolute addresses
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*/
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trampoline_end = (uint64_t)(&ld_trampoline_end) - delta;
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primary_entry_end = (uint64_t)(&ld_entry_end) - delta;
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rela_end = rela_start + rela_size;
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while (rela_start < rela_end) {
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entry = (struct Elf64_Rel *)rela_start;
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if ((elf64_r_type(entry->r_info)) == R_X86_64_RELATIVE) {
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addr = (uint64_t *)(delta + entry->r_offset);
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/*
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* we won't fixup any symbols from trampoline.S or cpu_primary.S
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* for a number of reasons:
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*
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* - trampoline code itself takes another relocation,
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* so any entries for trampoline symbols can't be fixed up
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* through .rela sections
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* - Linker option "-z noreloc-overflow" could force R_X86_32
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* to R_X86_64 in the relocation sections, which could make
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* the fixed up code dirty.
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*/
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if ((entry->r_offset > trampoline_end) && (entry->r_offset > primary_entry_end)) {
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*addr += delta;
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}
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}
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rela_start += entry_size;
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}
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}
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#endif
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}
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