mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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8b16be9185
Many of the license and Intel copyright headers include the "All rights reserved" string. It is not relevant in the context of the BSD-3-Clause license that the code is released under. This patch removes those strings throughout the code (hypervisor, devicemodel and misc). Tracked-On: #7254 Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
402 lines
14 KiB
Python
402 lines
14 KiB
Python
# Copyright (C) 2019 Intel Corporation.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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import sys
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import ctypes
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import parser_lib
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ACPI_DMAR_TYPE = {
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'ACPI_DMAR_TYPE_HARDWARE_UNIT':0,
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'ACPI_DMAR_TYPE_RESERVED_MEMORY':1,
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'ACPI_DMAR_TYPE_ROOT_ATS':2,
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'ACPI_DMAR_TYPE_HARDWARE_AFFINITY':3,
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'ACPI_DMAR_TYPE_NAMESPACE':4,
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'ACPI_DMAR_TYPE_RESERVED':5,
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}
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ACPI_DEV_SCOPE_TYPE = {
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'ACPI_DMAR_SCOPE_TYPE_NOT_USED':0,
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'ACPI_DMAR_SCOPE_TYPE_ENDPOINT':1,
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'ACPI_DMAR_SCOPE_TYPE_BRIDGE':2,
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'ACPI_DMAR_SCOPE_TYPE_IOAPIC':3,
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'ACPI_DMAR_SCOPE_TYPE_HPET':4,
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'ACPI_DMAR_SCOPE_TYPE_NAMESPACE':5,
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'ACPI_DMAR_SCOPE_TYPE_RESERVED':6,
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}
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class DmarHeader(ctypes.Structure):
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"""DMAR Header"""
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_pack_ = 1
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_fields_ = [
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('signature', ctypes.c_char*4),
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('length', ctypes.c_uint32),
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('revision', ctypes.c_ubyte),
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('checksum', ctypes.c_ubyte),
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('oem_id', ctypes.c_char*6),
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('oem_table_id', ctypes.c_char*8),
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('oem_revision', ctypes.c_uint32),
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('asl_compiler_id', ctypes.c_char*4),
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('asl_compiler_revision', ctypes.c_uint32),
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('host_addr_width', ctypes.c_ubyte),
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('flags', ctypes.c_ubyte),
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('reserved', ctypes.c_ubyte*10),
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]
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def style_check_1(self):
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"""Style check if have public method"""
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self._pack_ = 0
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def style_check_2(self):
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"""Style check if have public method"""
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self._pack_ = 0
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class DmarDevScope(ctypes.Structure):
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"""DMAR Device Scope"""
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_pack_ = 1
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_fields_ = [
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('entry_type', ctypes.c_uint8),
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('scope_length', ctypes.c_uint8),
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('reserved', ctypes.c_uint16),
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('enumeration_id', ctypes.c_uint8),
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('bus', ctypes.c_uint8),
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]
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def style_check_1(self):
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"""Style check if have public method"""
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self._pack_ = 0
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def style_check_2(self):
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"""Style check if have public method"""
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self._pack_ = 0
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class DmarHwUnit(ctypes.Structure):
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"""DMAR Hardware Unit"""
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_pack_ = 1
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_fields_ = [
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('type', ctypes.c_uint16),
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('length', ctypes.c_uint16),
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('flags', ctypes.c_uint8),
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('reserved', ctypes.c_uint8),
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('segment', ctypes.c_uint16),
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('address', ctypes.c_uint64),
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]
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def style_check_1(self):
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"""Style check if have public method"""
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self._pack_ = 0
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def style_check_2(self):
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"""Style check if have public method"""
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self._pack_ = 0
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class DevScopePath(ctypes.Structure):
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"""DEVICE Scope Path"""
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_pack_ = 1
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_fields_ = [
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("device", ctypes.c_uint8),
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("function", ctypes.c_uint8),
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]
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def style_check_1(self):
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"""Style check if have public method"""
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self._pack_ = 0
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def style_check_2(self):
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"""Style check if have public method"""
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self._pack_ = 0
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class DmarHwList:
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"""DMAR HW List"""
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def __init__(self):
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self.hw_segment_list = []
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self.hw_flags_list = []
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self.hw_address_list = []
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self.hw_ignore = {}
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def style_check_1(self):
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"""Style check if have public method"""
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self.hw_ignore = {}
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def style_check_2(self):
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"""Style check if have public method"""
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self.hw_ignore = {}
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class DmarDevList:
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"""DMAR DEV List"""
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def __init__(self):
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self.dev_scope_cnt_list = []
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self.dev_bus_list = []
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self.dev_path_list = []
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self.dev_scope_id_list = []
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self.dev_scope_type_list = []
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def style_check_1(self):
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"""Style check if have public method"""
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self.dev_bus_list = []
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def style_check_2(self):
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"""Style check if have public method"""
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self.dev_bus_list = []
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class DmarTbl:
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"""DMAR TBL"""
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def __init__(self):
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self.drhd_offset = 0
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self.dmar_drhd = 0
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self.dmar_dev_scope = 0
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self.dev_scope_offset = 0
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self.dev_scope_cnt = 0
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self.path_offset = 0
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def style_check_1(self):
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"""Style check if have public method"""
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self.path_offset = 0
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def style_check_2(self):
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"""Style check if have public method"""
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self.path_offset = 0
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# TODO: Get board information is independent part of acrn-config tools, it does not get the GPU_SBDF default
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# config from the other part of tools, so hard code the GPU_SBDF to gernerate DRHDx_IGNORE macro
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CONFIG_IGD_SBDF = 0x10
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PCI_BRIDGE_HEADER = 1
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class PathDevFun:
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"""Path Device Function meta data"""
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def __init__(self):
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self.path = 0
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self.device = 0
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self.function = 0
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def style_check_1(self):
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"""Style check if have public method"""
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self.path = 0
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def style_check_2(self):
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"""Style check if have public method"""
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self.path = 0
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def get_secondary_bus(dmar_tbl, tmp_dev, tmp_fun):
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cmd = "lspci -xxx"
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secondary_bus_str = ''
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found_pci_bdf = False
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pci_bridge_header_type = False
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res = parser_lib.cmd_execute(cmd)
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while True:
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line = res.stdout.readline().decode("ascii")
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if not line:
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break
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if ':' not in line or len(line.strip().split(":")) < 1:
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continue
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if not found_pci_bdf:
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if '.' not in line.strip():
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continue
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bus = int(line.strip().split(":")[0], 16)
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dev = int(line.strip().split()[0].split(":")[1].split(".")[0], 16)
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fun = int(line.strip().split()[0].split(":")[1].split(".")[1].strip(), 16)
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if bus == dmar_tbl.dmar_dev_scope.bus and dev == tmp_dev and fun == tmp_fun:
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found_pci_bdf = True
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continue
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else:
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if "00:" == line.strip().split()[0]:
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# PCI Header type stores in 0xE
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if len(line.split()) >= 16 and int(line.strip().split()[15], 16) & 0x7 == PCI_BRIDGE_HEADER:
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pci_bridge_header_type = True
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continue
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if not pci_bridge_header_type:
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continue
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# found the pci device, parse the secondary bus
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if "10:" == line.strip().split()[0]:
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# Secondary PCI BUS number stores in 0x18
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secondary_bus_str = line.split()[9]
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found_pci_bdf = False
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pci_bridge_header_type = False
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break
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# the pci device has secondary bus
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if secondary_bus_str:
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dmar_tbl.dmar_dev_scope.bus = int(secondary_bus_str, 16)
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def walk_pci_bus(tmp_pdf, dmar_tbl, dmar_hw_list, drhd_cnt):
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"""Walk Pci bus
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:param tmp_pdf: it is a class what contains path,device,function in dmar device scope region
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:param dmar_tbl: it is a class to describe dmar which contains Device Scope and DRHD
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:param dmar_hw_list: it is a class to describe hardware scope in DMAR table
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:param drhd_cnt: it is a counter to calculate the DRHD in DMAR table
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"""
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# path offset is in end of device spcope
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dmar_tbl.path_offset = dmar_tbl.dev_scope_offset + ctypes.sizeof(DmarDevScope)
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n_cnt = (dmar_tbl.dmar_dev_scope.scope_length - ctypes.sizeof(DmarDevScope)) // 2
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while n_cnt:
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scope_path = DevScopePath.from_address(dmar_tbl.path_offset)
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tmp_pdf.device = scope_path.device
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tmp_pdf.function = scope_path.function
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tmp_pdf.path = (((tmp_pdf.device & 0x1F) << 3) | ((tmp_pdf.function & 0x7)))
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# walk the secondary pci bus
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get_secondary_bus(dmar_tbl, tmp_pdf.device, tmp_pdf.function)
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if ((dmar_tbl.dmar_drhd.segment << 16) | (
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dmar_tbl.dmar_dev_scope.bus << 8) | tmp_pdf.path) == CONFIG_IGD_SBDF:
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dmar_hw_list.hw_ignore[drhd_cnt] = 'true'
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dmar_tbl.path_offset += ctypes.sizeof(DevScopePath)
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n_cnt -= 1
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def walk_dev_scope(dmar_tbl, dmar_dev_list, dmar_hw_list, drhd_cnt):
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"""Walk device scope
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:param dmar_tbl: it is a class to describe dmar which contains Device Scope and DRHD
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:param dmar_dev_list: it is a class to describe device scope in DMAR table
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:param dmar_hw_list: it is a class to describe DRHD in DMAR table
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:param drhd_cnt: it is a counter to calculate the DRHD in DMAR table
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"""
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dmar_tbl.dev_scope_offset = dmar_tbl.drhd_offset + ctypes.sizeof(DmarHwUnit)
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scope_end = dmar_tbl.dev_scope_offset + dmar_tbl.dmar_drhd.length
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dmar_tbl.dev_scope_cnt = 0
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while dmar_tbl.dev_scope_offset < scope_end:
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dmar_tbl.dmar_dev_scope = DmarDevScope.from_address(dmar_tbl.dev_scope_offset)
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if dmar_tbl.dmar_dev_scope.scope_length <= 0:
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break
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if dmar_tbl.dmar_dev_scope.entry_type != \
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ACPI_DEV_SCOPE_TYPE['ACPI_DMAR_SCOPE_TYPE_NOT_USED'] and \
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dmar_tbl.dmar_dev_scope.entry_type < \
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ACPI_DEV_SCOPE_TYPE['ACPI_DMAR_SCOPE_TYPE_RESERVED']:
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dmar_tbl.dev_scope_cnt += 1
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# get type and id from device scope
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dmar_dev_list.dev_scope_type_list.append(dmar_tbl.dmar_dev_scope.entry_type)
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dmar_dev_list.dev_scope_id_list.append(dmar_tbl.dmar_dev_scope.enumeration_id)
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# walk the pci bus with path deep, and find the {Device,Function}
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tmp_pdf = PathDevFun()
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walk_pci_bus(tmp_pdf, dmar_tbl, dmar_hw_list, drhd_cnt)
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dmar_dev_list.dev_bus_list.append(dmar_tbl.dmar_dev_scope.bus)
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dmar_dev_list.dev_path_list.append(tmp_pdf.path)
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dmar_tbl.dev_scope_offset += dmar_tbl.dmar_dev_scope.scope_length
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def walk_dmar_table(dmar_tbl, dmar_hw_list, dmar_dev_list, sysnode):
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"""Walk dmar table and get information
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:param dmar_tbl: it is a class to describe dmar which contains Device Scope and DRHD
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:param dmar_hw_list: it is a class to describe hardware scope in DMAR table
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:param dmar_dev_list: it is a class to describe device scope in DMAR table
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:param sysnode: the system device node of acpi table, such as: /sys/firmware/acpi/tables/DMAR
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"""
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data = open(sysnode, 'rb').read()
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buf = ctypes.create_string_buffer(data, len(data))
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addr = ctypes.addressof(buf)
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# contain the dmar tbl_header
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dmar_tbl_header = DmarHeader.from_address(addr)
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# cytpes.c_int16.from_address(addr) reade int16 from ad1
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# in end of tbl header is remapping structure(DRHD/sub tbl)
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dmar_tbl.drhd_offset = addr + ctypes.sizeof(DmarHeader)
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drhd_cnt = 0
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while True:
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# get one DRHD type in sub table
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dmar_tbl.dmar_drhd = DmarHwUnit.from_address(dmar_tbl.drhd_offset)
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dmar_type = dmar_tbl.dmar_drhd.type
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dmar_len = dmar_tbl.dmar_drhd.length
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if dmar_tbl.drhd_offset - addr >= dmar_tbl_header.length:
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break
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if dmar_type != ACPI_DMAR_TYPE['ACPI_DMAR_TYPE_HARDWARE_UNIT']:
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dmar_tbl.drhd_offset += dmar_len
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continue
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# initialize DRHDx_IGNORE to false
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dmar_hw_list.hw_ignore[drhd_cnt] = 'false'
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dmar_hw_list.hw_segment_list.append(dmar_tbl.dmar_drhd.segment)
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dmar_hw_list.hw_flags_list.append(dmar_tbl.dmar_drhd.flags)
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dmar_hw_list.hw_address_list.append(dmar_tbl.dmar_drhd.address)
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# in end of DRHD/sub tbl header is dev scope, then enumerate the device scope
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walk_dev_scope(dmar_tbl, dmar_dev_list, dmar_hw_list, drhd_cnt)
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dmar_dev_list.dev_scope_cnt_list.append(dmar_tbl.dev_scope_cnt)
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drhd_cnt += 1
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dmar_tbl.drhd_offset += dmar_len
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return (dmar_tbl, dmar_hw_list, dmar_dev_list, drhd_cnt)
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def write_dmar_data(sysnode, config):
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"""Write the DMAR data to board info
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:param sysnode: the system device node of acpi table, such as: /sys/firmware/acpi/tables/DMAR
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:param config: file pointer that opened for writing board information
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"""
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dmar_hw_list = DmarHwList()
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dmar_dev_list = DmarDevList()
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dmar_tbl = DmarTbl()
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(dmar_tbl, dmar_hw_list, dmar_dev_list, drhd_cnt) = walk_dmar_table(
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dmar_tbl, dmar_hw_list, dmar_dev_list, sysnode)
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print("\t#define DRHD_COUNT {0}U".format(drhd_cnt), file=config)
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print("", file=config)
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prev_dev_scope_num = 0
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for drhd_hw_i in range(drhd_cnt):
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dev_scope_num = dmar_dev_list.dev_scope_cnt_list[drhd_hw_i]
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print("\t#define DRHD"+str(drhd_hw_i)+"_DEV_CNT {0}U".format(
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hex(dmar_dev_list.dev_scope_cnt_list[drhd_hw_i])), file=config)
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print("\t#define DRHD"+str(drhd_hw_i)+"_SEGMENT {0}U".format(
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hex(dmar_hw_list.hw_segment_list[drhd_hw_i])), file=config)
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print("\t#define DRHD"+str(drhd_hw_i)+"_FLAGS {0}U".format(
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hex(dmar_hw_list.hw_flags_list[drhd_hw_i])), file=config)
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print("\t#define DRHD"+str(drhd_hw_i)+"_REG_BASE 0x{:0>2X}UL".format(
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dmar_hw_list.hw_address_list[drhd_hw_i]), file=config)
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if drhd_hw_i in dmar_hw_list.hw_ignore.keys():
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print("\t#define DRHD"+str(drhd_hw_i)+"_IGNORE {0}".format(
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dmar_hw_list.hw_ignore[drhd_hw_i]), file=config)
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for dev_scope_i in range(dev_scope_num):
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print("\t#define DRHD"+str(drhd_hw_i)+"_DEVSCOPE"+str(dev_scope_i),
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file=config, end="")
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print("_TYPE {0}U".format(
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hex(dmar_dev_list.dev_scope_type_list[prev_dev_scope_num + dev_scope_i])),
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file=config)
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print("\t#define DRHD"+str(drhd_hw_i)+"_DEVSCOPE"+str(dev_scope_i),
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file=config, end="")
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print("_ID {0}U".format(
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hex(dmar_dev_list.dev_scope_id_list[prev_dev_scope_num + dev_scope_i])),
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file=config)
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print("\t#define DRHD"+str(drhd_hw_i)+"_DEVSCOPE"+str(dev_scope_i),
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file=config, end="")
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print("_BUS {0}U".format(hex(
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dmar_dev_list.dev_bus_list[prev_dev_scope_num + dev_scope_i])),
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file=config)
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print("\t#define DRHD"+str(drhd_hw_i)+"_DEVSCOPE"+str(dev_scope_i),
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file=config, end="")
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print("_PATH {0}U".format(hex(
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dmar_dev_list.dev_path_list[prev_dev_scope_num + dev_scope_i])),
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file=config)
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print("", file=config)
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prev_dev_scope_num += dev_scope_num
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