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1. In default prescaler, the wdt clock is 1 KHz for a 20-bit counter, which means approximate 1 second for 10 bits; 2. the default reset timer in seconds need to left shift 10 bits to represent the value that set to i6300esb register; Tracked-On: #1142 Signed-off-by: Victor Sun <victor.sun@intel.com> Reviewed-by: Minggui Cao <minggui.cao@intel.com> Acked-by: Yin Fengwei <fengwei.yin@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>