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f4122d99c5
Replace the BSD-3-Clause boiler plate license text with an SPDX tag. Fixes: #189 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
36 lines
1006 B
C
36 lines
1006 B
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IOAPIC_H
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#define IOAPIC_H
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/* IOAPIC_MAX_LINES is architecturally defined.
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* The usable RTEs may be a subset of the total on a per IO APIC basis.
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*/
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#define IOAPIC_MAX_LINES 120
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#define NR_LEGACY_IRQ 16
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#define NR_LEGACY_PIN NR_LEGACY_IRQ
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#define NR_MAX_GSI (NR_IOAPICS*IOAPIC_MAX_LINES)
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#define GSI_MASK_IRQ(irq) irq_gsi_mask_unmask((irq), true)
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#define GSI_UNMASK_IRQ(irq) irq_gsi_mask_unmask((irq), false)
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#define GSI_SET_RTE(irq, rte) ioapic_set_rte((irq), (rte))
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void setup_ioapic_irq(void);
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int get_ioapic_info(char *str, int str_max_len);
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bool irq_is_gsi(int irq);
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int irq_gsi_num(void);
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int irq_to_pin(int irq);
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int pin_to_irq(int pin);
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void irq_gsi_mask_unmask(int irq, bool mask);
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void ioapic_set_rte(int irq, uint64_t rte);
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void ioapic_get_rte(int irq, uint64_t *rte);
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extern uint16_t legacy_irq_to_pin[];
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extern uint16_t pic_ioapic_pin_map[];
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#endif /* IOAPIC_H */
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