acrn-hypervisor/hypervisor/include
Sainath Grandhi 6d5456a0df hv: Bit Representation for IOAPIC RTE
As we enable Interrupt Remapping, bit positions in IOAPIC RTEs
have a different syntax for programming. ACRN should handle original
format for vIOAPIC as well IR representation for physical IOAPIC.
This patch adds bit granularity IOAPIC RTE.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
..
arch/x86 hv: Bit Representation for IOAPIC RTE 2019-01-26 23:25:34 +08:00
common hv: Add bit representation for MSI addr and data 2019-01-26 23:25:34 +08:00
debug security: Increase buffer size to avoid buffer overflow error 2019-01-25 10:24:55 +08:00
dm HV: remove unused mptable info 2019-01-18 11:50:00 +08:00
lib hv: remove the usage of 'atoi()' 2018-12-26 13:50:26 +08:00
public HV: rename the term of vm0 to sos vm 2019-01-21 18:03:31 +08:00
hv_debug.h HV: Added Initial support for SEP/SOCWATCH profiling 2018-10-26 13:39:07 +08:00
hypervisor.h HV: rename the term of vm0 to sos vm 2019-01-21 18:03:31 +08:00