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https://github.com/projectacrn/acrn-hypervisor.git
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8b16be9185
Many of the license and Intel copyright headers include the "All rights reserved" string. It is not relevant in the context of the BSD-3-Clause license that the code is released under. This patch removes those strings throughout the code (hypervisor, devicemodel and misc). Tracked-On: #7254 Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
128 lines
4.0 KiB
C
128 lines
4.0 KiB
C
/*-
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* Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
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* Copyright (c) 2013 Neel Natu <neel@freebsd.org>
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* Copyright (c) 2017 Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef VIOAPIC_H
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#define VIOAPIC_H
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/**
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* @file vioapic.h
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*
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* @brief public APIs for virtual I/O APIC
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*/
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#include <asm/apicreg.h>
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#include <asm/ioapic.h>
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#include <util.h>
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#define VIOAPIC_BASE 0xFEC00000UL
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#define VIOAPIC_SIZE 4096UL
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#define REDIR_ENTRIES_HW 120U /* Service VM align with native ioapic */
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#define STATE_BITMAP_SIZE INT_DIV_ROUNDUP(REDIR_ENTRIES_HW, 64U)
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#define IOAPIC_RTE_LOW_INTVEC ((uint32_t)IOAPIC_RTE_INTVEC)
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/*
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* id field is used to emulate the IOAPIC_ID register of vIOAPIC
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*/
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struct acrn_single_vioapic {
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spinlock_t lock;
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struct acrn_vm *vm;
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struct ioapic_info chipinfo;
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uint32_t ioregsel;
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union ioapic_rte rtbl[REDIR_ENTRIES_HW];
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/* pin_state status bitmap: 1 - high, 0 - low */
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uint64_t pin_state[STATE_BITMAP_SIZE];
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};
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/*
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* ioapic_num represents the number of IO-APICs emulated for the VM.
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* nr_gsi represents the maximum number of GSI emulated for the VM.
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*/
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struct acrn_vioapics {
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uint8_t ioapic_num;
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uint32_t nr_gsi;
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struct acrn_single_vioapic vioapic_array[CONFIG_MAX_IOAPIC_NUM];
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};
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void dump_vioapic(struct acrn_vm *vm);
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void vioapic_init(struct acrn_vm *vm);
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void reset_vioapics(const struct acrn_vm *vm);
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/**
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* @brief virtual I/O APIC
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*
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* @addtogroup acrn_vioapic ACRN vIOAPIC
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* @{
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*/
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/**
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* @brief Set vIOAPIC IRQ line status.
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*
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* @param[in] vm Pointer to target VM
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* @param[in] vgsi GSI for the virtual interrupt
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* @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/
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* GSI_RAISING_PULSE/GSI_FALLING_PULSE
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*
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* @pre irqline < vioapic_pincount(vm)
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*
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* @return None
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*/
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void vioapic_set_irqline_lock(const struct acrn_vm *vm, uint32_t vgsi, uint32_t operation);
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/**
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* @brief Set vIOAPIC IRQ line status.
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*
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* Similar with vioapic_set_irqline_lock(),but would not make sure
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* operation be done with ioapic lock.
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*
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* @param[in] vm Pointer to target VM
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* @param[in] vgsi GSI for the virtual interrupt
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* @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/
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* GSI_RAISING_PULSE/GSI_FALLING_PULSE
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*
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* @pre irqline < vioapic_pincount(vm)
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* @return None
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*/
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void vioapic_set_irqline_nolock(const struct acrn_vm *vm, uint32_t vgsi, uint32_t operation);
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uint32_t get_vm_gsicount(const struct acrn_vm *vm);
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void vioapic_broadcast_eoi(const struct acrn_vm *vm, uint32_t vector);
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void vioapic_get_rte(const struct acrn_vm *vm, uint32_t vgsi, union ioapic_rte *rte);
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int32_t vioapic_mmio_access_handler(struct io_request *io_req, void *handler_private_data);
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struct acrn_single_vioapic *vgsi_to_vioapic_and_vpin(const struct acrn_vm *vm, uint32_t vgsi, uint32_t *vpin);
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/**
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* @}
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*/
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/* End of acrn_vioapic */
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#endif /* VIOAPIC_H */
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