mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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d0e9f244ed
ACRN in partition mode does not have vector and APIC ID remapping for device interrupts. Only MSIs are supported. No IOAPIC and legacy interrupts for the VMs in ACRN partition mode. Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
425 lines
7.5 KiB
ArmAsm
425 lines
7.5 KiB
ArmAsm
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <gdt.h>
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#include <idt.h>
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.altmacro
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.global HOST_IDT
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.global HOST_IDTR
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.section .data
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.align 8
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.long 0
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.short 0
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HOST_IDTR:
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.short HOST_IDT_SIZE - 1
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.quad HOST_IDT
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/*
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* We'll rearrange and fix up the descriptors at runtime
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*/
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.macro interrupt_descriptor entry, dpl=0 ist=0
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/* 0x0008 = HOST_GDT_RING0_CODE_SEL */
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.long 0x0008 << 16
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.long 0x00008e00 + (dpl << 13) + ist
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.quad entry
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.endm
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.macro trap_descriptor entry, dpl=0, ist=0
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/* 0x0008 = HOST_GDT_RING0_CODE_SEL */
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.long 0x0008 << 16
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.long 0x00008f00 + (dpl <<13) + ist
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.quad entry
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.endm
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.macro _external_interrupt_descriptor vector
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__external_interrupt_descriptor %vector
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.endm
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.macro __external_interrupt_descriptor vector
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interrupt_descriptor external_interrupt_\vector
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.endm
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#define MACHINE_CHECK_IST (0x1)
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#define DOUBLE_FAULT_IST (0x2)
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#define STACK_FAULT_IST (0x3)
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/*
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* We'll use interrupt gates. Change to trap or task only as needed.
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*/
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.section .rodata
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.align 16
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HOST_IDT:
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interrupt_descriptor excp_divide_error
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interrupt_descriptor excp_debug, 3
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interrupt_descriptor excp_nmi
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interrupt_descriptor excp_breakpoint, 3
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interrupt_descriptor excp_overflow, 3
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interrupt_descriptor excp_bounds_check
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interrupt_descriptor excp_illegal_opcode
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interrupt_descriptor excp_device_not_available
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interrupt_descriptor excp_double_fault, 0, DOUBLE_FAULT_IST
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interrupt_descriptor excp_rsvd_09
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interrupt_descriptor excp_invalid_tss
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interrupt_descriptor excp_segment_not_present
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interrupt_descriptor excp_stack_fault, 0, STACK_FAULT_IST
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interrupt_descriptor excp_general_protection
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interrupt_descriptor excp_page_fault
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interrupt_descriptor excp_rsvd_0f
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interrupt_descriptor excp_float_error
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interrupt_descriptor excp_alignment_check
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interrupt_descriptor expt_machine_check, 0, MACHINE_CHECK_IST
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interrupt_descriptor excp_simd_fp_error
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interrupt_descriptor excp_virtualization
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interrupt_descriptor excp_rsvd_21
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interrupt_descriptor excp_rsvd_22
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interrupt_descriptor excp_rsvd_23
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interrupt_descriptor excp_rsvd_24
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interrupt_descriptor excp_rsvd_25
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interrupt_descriptor excp_rsvd_26
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interrupt_descriptor excp_rsvd_27
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interrupt_descriptor excp_rsvd_28
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interrupt_descriptor excp_rsvd_29
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interrupt_descriptor excp_rsvd_30
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interrupt_descriptor excp_rsvd_31
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vector = 0x20
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.rept (0x100 - 0x20)
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_external_interrupt_descriptor vector
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vector = vector + 1
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.endr
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.section .text
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.align 16
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excp_divide_error:
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pushq $0x0 /* pseudo error code */
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pushq $0x00
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jmp excp_save_frame
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.align 8
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excp_debug:
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pushq $0x0 /* pseudo error code */
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pushq $0x01
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jmp excp_save_frame
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.align 8
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excp_nmi:
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.align 8
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excp_breakpoint:
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pushq $0x0 /* pseudo error code */
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pushq $0x03
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jmp excp_save_frame
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.align 8
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excp_overflow:
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pushq $0x0 /* pseudo error code */
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pushq $0x04
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jmp excp_save_frame
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.align 8
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excp_bounds_check:
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pushq $0x0 /* pseudo error code */
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pushq $0x05
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jmp excp_save_frame
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.align 8
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excp_illegal_opcode:
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pushq $0x0 /* pseudo error code */
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pushq $0x06
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jmp excp_save_frame
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.align 8
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excp_device_not_available:
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pushq $0x0 /* pseudo error code */
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pushq $0x07
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jmp excp_save_frame
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.align 8
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excp_double_fault:
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pushq $0x08
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jmp excp_save_frame
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.align 8
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excp_invalid_tss:
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pushq $0x0A
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jmp excp_save_frame
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.align 8
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excp_segment_not_present:
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pushq $0x0B
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jmp excp_save_frame
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.align 8
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excp_stack_fault:
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pushq $0x0C
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jmp excp_save_frame
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.align 8
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excp_general_protection:
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pushq $0x0D
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jmp excp_save_frame
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.align 8
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excp_page_fault:
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pushq $0x0E
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jmp excp_save_frame
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.align 8
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excp_float_error:
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pushq $0x0 /* pseudo error code */
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pushq $0x10
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jmp excp_save_frame
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.align 8
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excp_alignment_check:
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pushq $0x11
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jmp excp_save_frame
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.align 8
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expt_machine_check:
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pushq $0x0 /* pseudo error code */
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pushq $0x12
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jmp excp_save_frame
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.align 8
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excp_simd_fp_error:
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pushq $0x0 /* pseudo error code */
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pushq $0x13
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jmp excp_save_frame
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.align 8
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excp_virtualization:
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pushq $0x0 /* pseudo error code */
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pushq $0x14
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jmp excp_save_frame
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/*
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* Macros for rsvd vectors. Vectors 0x09, 0x0F, 0x15 through 0x1F
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*/
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.macro _rsvd_vector vector
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__rsvd_vector %vector
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.endm
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.macro __rsvd_vector vector
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.align 8
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excp_rsvd_\vector\():
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pushq $0x0 /* pseudo error code */
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pushq $\vector
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jmp excp_rsvd
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.endm
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.align 8
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excp_rsvd_09:
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_rsvd_vector 0x09
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.align 8
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excp_rsvd_0f:
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_rsvd_vector 0x0f
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vector = 0x15
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.rept (0x20 - 0x15)
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_rsvd_vector vector
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vector = vector + 1
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.endr
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/*
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* Macros for external interrupts. Vectors$0x20 through$0xFF
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*/
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.macro _external_interrupt vector
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__external_interrupt %vector
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.endm
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.macro __external_interrupt vector
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.align 8
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external_interrupt_\vector\():
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pushq $0x0 /* pseudo error code */
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pushq $\vector
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jmp external_interrupt_save_frame
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.endm
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vector =0x20
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.rept (0x100 - 0x20)
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_external_interrupt vector
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vector = vector + 1
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.endr
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/*
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* Common entry point for defined exceptions
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*/
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.align 8
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excp_save_frame:
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pushq %r15
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pushq %r14
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pushq %r13
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pushq %r12
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pushq %r11
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pushq %r10
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pushq %r9
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pushq %r8
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pushq %rdi
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pushq %rsi
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pushq %rbp
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pushq %rsp
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pushq %rbx
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pushq %rdx
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pushq %rcx
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pushq %rax
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/* Put current stack pointer into 1st param register (rdi) */
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movq %rsp, %rdi
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call dispatch_exception
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popq %rax
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popq %rcx
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popq %rdx
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popq %rbx
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popq %rsp
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popq %rbp
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popq %rsi
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popq %rdi
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popq %r8
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popq %r9
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popq %r10
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popq %r11
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popq %r12
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popq %r13
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popq %r14
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popq %r15
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/* Skip vector and error code*/
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add $16, %rsp
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iretq
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/*
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* Common entry point for reserved exceptions.
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* These should never execute.
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* We put a handler on them anyway to highlight the unexpected.
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*/
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.align 8
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excp_rsvd:
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pushq %r15
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pushq %r14
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pushq %r13
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pushq %r12
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pushq %r11
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pushq %r10
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pushq %r9
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pushq %r8
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pushq %rdi
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pushq %rsi
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pushq %rbp
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pushq %rsp
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pushq %rbx
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pushq %rdx
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pushq %rcx
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pushq %rax
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/* Put current stack pointer into 1st param register (rdi) */
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movq %rsp, %rdi
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call dispatch_exception
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popq %rax
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popq %rcx
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popq %rdx
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popq %rbx
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popq %rsp
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popq %rbp
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popq %rsi
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popq %rdi
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popq %r8
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popq %r9
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popq %r10
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popq %r11
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popq %r12
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popq %r13
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popq %r14
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popq %r15
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/* Skip vector and error code*/
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add $16, %rsp
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iretq
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/*
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* Common entry point for defined interrupts.
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* Vectors 0x20 through 0xFF
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*/
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.align 8
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external_interrupt_save_frame:
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pushq %r15
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pushq %r14
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pushq %r13
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pushq %r12
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pushq %r11
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pushq %r10
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pushq %r9
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pushq %r8
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pushq %rdi
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pushq %rsi
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pushq %rbp
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pushq %rsp
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pushq %rbx
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pushq %rdx
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pushq %rcx
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pushq %rax
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/* Put current stack pointer into 1st param register (rdi) */
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movq %rsp, %rdi
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#ifdef CONFIG_PARTITION_MODE
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call partition_mode_dispatch_interrupt
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#else
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call dispatch_interrupt
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#endif
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/*
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* We disable softirq path from interrupt IRET, since right now all IRQ
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* are for Guest.
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*/
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popq %rax
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popq %rcx
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popq %rdx
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popq %rbx
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popq %rsp
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popq %rbp
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popq %rsi
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popq %rdi
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popq %r8
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popq %r9
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popq %r10
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popq %r11
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popq %r12
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popq %r13
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popq %r14
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popq %r15
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/* Skip vector and error code*/
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add $16, %rsp
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iretq
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