Mingqiang Chi 83c0a97fb1 hv: fix clang analyzer deadcode ...

remove the dead code since the variable is never used.

Tracked-On: #6776
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>

2022-01-07 13:47:32 +08:00

..

boot

HV: fix MISRA violation of _ld_ram_xxx

2021-11-26 16:45:17 +08:00

configs

hv: remove UUID

2021-11-16 14:42:59 +08:00

guest

hv: fix clang analyzer deadcode

2022-01-07 13:47:32 +08:00

lib

…

seed

ACRN: hv: Terminology modification in hv code

2021-11-02 10:00:55 +08:00

cpu_caps.c

hv:remove 2 bits vmx capability check

2021-12-13 08:52:52 +08:00

cpu_state_tbl.c

HV: treewide: fix violations of coding guideline C-TY-12

2021-11-04 18:15:47 +08:00

cpu.c

hv: vCAT: initialize the emulated_guest_msrs array for CAT msrs during platform initialization

2021-10-26 11:48:27 +08:00

e820.c

hv : encapsulate page align in e820_alloc_memory

2021-11-12 11:56:03 +08:00

exception.c

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gdt.c

…

idt.S

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init.c

hv: remove CONFIG_LOG_DESTINATION

2021-12-06 14:24:40 +08:00

ioapic.c

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irq.c

HV: treewide: fix violations of coding guideline C-TY-27 & C-TY-28

2021-11-04 18:15:47 +08:00

lapic.c

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mmu.c

HV: fix MISRA violation of _ld_ram_xxx

2021-11-26 16:45:17 +08:00

nmi.c

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notify.c

ACRN: hv: Terminology modification in hv code

2021-11-02 10:00:55 +08:00

page.c

HV: treewide: fix violations of coding guideline C-EP-05

2021-11-04 18:15:47 +08:00

pagetable.c

…

platform_caps.c

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pm.c

hv && config-tool: Add compilation option to disable all interrupts in HV

2021-12-10 09:50:17 +08:00

rdt.c

hv: vCAT: initialize vCAT MSRs during vmcs init

2021-10-28 19:12:29 +08:00

rtcm.c

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sched.S

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security.c

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sgx.c

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trampoline.c

hv: remove CONFIG_LOW_RAM_SIZE

2021-11-12 11:56:03 +08:00

tsc_deadline_timer.c

HV: arch: fix a violation of coding guideline C-TY-24

2021-11-04 18:15:47 +08:00

tsc.c

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vmx.c

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vtd.c

hv: rename CONFIG_IOMMU_BUS_NUM

2021-12-13 11:06:10 +08:00

wakeup.S

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