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https://github.com/projectacrn/acrn-hypervisor.git
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3956ce1596
The MMIO/PIO write APIs in io.h always take a uint32_t value but may uses it as
8, 16 or 32-bit integers. This patch converts the prototypes to align with their
functionality.
The pointer conversion and assignment are splitted to separate statements to
prevent static checkers from being confused about the underlying types.
v1 -> v2:
* Change the prototype of mmio-related functions, instead of keeping the
explicit conversions internal. The addresses are kept void* since in most
cases hva (in void*) is passed.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
154 lines
3.4 KiB
C
154 lines
3.4 KiB
C
/*
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* Copyright (C) <2018> Intel Corporation
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <hypervisor.h>
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struct run_context cpu_ctx;
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/* whether the host enter s3 success */
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uint8_t host_enter_s3_success = 1U;
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void restore_msrs(void)
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{
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#ifdef STACK_PROTECTOR
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struct stack_canary *psc = &get_cpu_var(stack_canary);
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msr_write(MSR_IA32_FS_BASE, (uint64_t)psc);
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#endif
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}
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static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val)
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{
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uint16_t val16 = (uint16_t)val;
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if (gas->space_id == SPACE_SYSTEM_MEMORY)
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mmio_write_word(val16, HPA2HVA(gas->address));
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else
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io_write_word(val16, gas->address);
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}
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static uint32_t acpi_gas_read(struct acpi_generic_address *gas)
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{
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uint32_t ret = 0;
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if (gas->space_id == SPACE_SYSTEM_MEMORY)
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ret = mmio_read_word(HPA2HVA(gas->address));
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else
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ret = io_read_word(gas->address);
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return ret;
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}
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void do_acpi_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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uint32_t pm1b_cnt_val)
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{
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uint32_t s1, s2;
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acpi_gas_write(&vm->pm.sx_state_data->pm1a_cnt, pm1a_cnt_val);
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if (vm->pm.sx_state_data->pm1b_cnt.address != 0)
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acpi_gas_write(&vm->pm.sx_state_data->pm1b_cnt, pm1b_cnt_val);
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while (1) {
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/* polling PM1 state register to detect wether
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* the Sx state enter is interrupted by wakeup event.
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*/
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s1 = s2 = 0;
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s1 = acpi_gas_read(&vm->pm.sx_state_data->pm1a_evt);
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if (vm->pm.sx_state_data->pm1b_evt.address != 0) {
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s2 = acpi_gas_read(&vm->pm.sx_state_data->pm1b_evt);
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s1 |= s2;
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}
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/* According to ACPI spec 4.8.3.1.1 PM1 state register, the bit
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* WAK_STS(bit 15) is set if system will transition to working
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* state.
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*/
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if ((s1 & (1 << BIT_WAK_STS)) != 0)
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break;
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}
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}
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int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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uint32_t pm1b_cnt_val)
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{
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uint32_t pcpu_id;
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uint64_t pmain_entry_saved;
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uint32_t guest_wakeup_vec32;
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uint64_t *pmain_entry;
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/* We assume enter s3 success by default */
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host_enter_s3_success = 1;
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if (vm->pm.sx_state_data == NULL) {
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pr_err("No Sx state info avaiable. No Sx support");
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host_enter_s3_success = 0;
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return -1;
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}
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pause_vm(vm); /* pause vm0 before suspend system */
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pcpu_id = get_cpu_id();
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/* Save the wakeup vec set by guest. Will return to guest
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* with this wakeup vec as entry.
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*/
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guest_wakeup_vec32 = *vm->pm.sx_state_data->wake_vector_32;
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/* set ACRN wakeup vec instead */
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*vm->pm.sx_state_data->wake_vector_32 =
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(uint32_t) trampoline_start16_paddr;
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/* offline all APs */
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stop_cpus();
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/* Trampoline code is relocatable now. We have to calculate
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* main_entry address with relocation base address
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*/
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pmain_entry =
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(uint64_t *)(HPA2HVA(trampoline_start16_paddr) +
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(uint64_t) main_entry);
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/* Save default main entry and we will restore it after
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* back from S3. So the AP online could jmp to correct
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* main entry.
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*/
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pmain_entry_saved = *pmain_entry;
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/* Set the main entry for resume from S3 state */
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*pmain_entry = (uint64_t)restore_s3_context;
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CPU_IRQ_DISABLE();
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vmx_off(pcpu_id);
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suspend_console();
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suspend_ioapic();
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suspend_iommu();
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suspend_lapic();
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__enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
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/* release the lock aquired in trampoline code */
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spinlock_release(&trampoline_spinlock);
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resume_lapic();
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resume_iommu();
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resume_ioapic();
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resume_console();
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exec_vmxon_instr(pcpu_id);
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CPU_IRQ_ENABLE();
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/* restore the default main entry */
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*pmain_entry = pmain_entry_saved;
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/* online all APs again */
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start_cpus();
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/* jump back to vm */
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resume_vm_from_s3(vm, guest_wakeup_vec32);
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return 0;
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}
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