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b24a8a0f59
cleanup arch/x86/guest, only include some necessary header files, doesn't include hypervisor.h Tracked-On: #1842 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> modified: arch/x86/guest/assign.c modified: arch/x86/guest/ept.c modified: arch/x86/guest/guest_memory.c modified: arch/x86/guest/instr_emul.c modified: arch/x86/guest/io_emul.c modified: arch/x86/guest/pm.c modified: arch/x86/guest/trusty.c modified: arch/x86/guest/ucode.c modified: arch/x86/guest/vcpu.c modified: arch/x86/guest/vcpuid.c modified: arch/x86/guest/virq.c modified: arch/x86/guest/virtual_cr.c modified: arch/x86/guest/vlapic.c modified: arch/x86/guest/vm.c modified: arch/x86/guest/vmcall.c modified: arch/x86/guest/vmcs.c modified: arch/x86/guest/vmexit.c modified: arch/x86/guest/vmsr.c modified: arch/x86/guest/vmtrr.c modified: arch/x86/pm.c modified: include/arch/x86/guest/assign.h modified: include/arch/x86/guest/ept.h modified: include/arch/x86/guest/guest_memory.h modified: include/arch/x86/guest/instr_emul.h modified: include/arch/x86/guest/io_emul.h modified: include/arch/x86/guest/trusty.h modified: include/arch/x86/guest/vcpu.h modified: include/arch/x86/guest/vmcs.h modified: include/arch/x86/io_req.h modified: include/arch/x86/irq.h modified: include/arch/x86/lapic.h modified: include/arch/x86/mmu.h modified: include/arch/x86/pgtable.h modified: include/common/ptdev.h modified: include/debug/console.h
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VMCS_H_
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#define VMCS_H_
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#define VM_SUCCESS 0
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#define VM_FAIL -1
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#ifndef ASSEMBLER
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#include <types.h>
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#include <vmx.h>
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#include <vcpu.h>
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#define VMX_VMENTRY_FAIL 0x80000000U
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static inline uint32_t vmx_eoi_exit(uint32_t vector)
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{
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return (VMX_EOI_EXIT0_FULL + ((vector >> 6U) * 2U));
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}
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/* VM exit qulifications for APIC-access
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* Access type:
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* 0 = linear access for a data read during instruction execution
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* 1 = linear access for a data write during instruction execution
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* 2 = linear access for an instruction fetch
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* 3 = linear access (read or write) during event delivery
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* 10 = guest-physical access during event delivery
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* 15 = guest-physical access for an instructon fetch or during
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* instruction execution
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*/
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static inline uint64_t apic_access_type(uint64_t qual)
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{
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return ((qual >> 12U) & 0xFUL);
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}
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static inline uint64_t apic_access_offset(uint64_t qual)
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{
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return (qual & 0xFFFUL);
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}
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#define RFLAGS_C (1U<<0U)
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#define RFLAGS_Z (1U<<6U)
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#define RFLAGS_AC (1U<<18U)
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#define VMX_SUPPORT_UNRESTRICTED_GUEST (1U<<5U)
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void init_vmcs(struct acrn_vcpu *vcpu);
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uint64_t vmx_rdmsr_pat(const struct acrn_vcpu *vcpu);
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int32_t vmx_wrmsr_pat(struct acrn_vcpu *vcpu, uint64_t value);
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void switch_apicv_mode_x2apic(struct acrn_vcpu *vcpu);
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static inline enum vm_cpu_mode get_vcpu_mode(const struct acrn_vcpu *vcpu)
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{
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return vcpu->arch.cpu_mode;
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}
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#endif /* ASSEMBLER */
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#endif /* VMCS_H_ */
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